參數(shù)資料
型號: DV164136
廠商: Microchip Technology
文件頁數(shù): 46/107頁
文件大?。?/td> 0K
描述: DEVELOPMENT KIT FOR PIC18
產(chǎn)品培訓(xùn)模塊: PIC18 J Series MCU Overview
標(biāo)準(zhǔn)包裝: 1
系列: PIC®
類型: MCU
適用于相關(guān)產(chǎn)品: PIC18F8722,PIC18F87J11
所含物品: 板,線纜,CD,PICkit? 3 個編程器,電源
產(chǎn)品目錄頁面: 659 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: PIC18F87J11-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F87J11T-I/PTTR-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722T-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722T-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
2007-2012 Microchip Technology Inc.
DS39778E-page 43
PIC18F87J11 FAMILY
3.5
Internal Oscillator Block
The PIC18F87J11 family of devices includes an
internal oscillator block which generates two different
clock signals; either can be used as the microcon-
troller’s clock source. This may eliminate the need for
an external oscillator circuit on the OSC1 and/or OSC2
pins.
The main output is the Fast RC oscillator, or INTOSC,
an 8 MHz clock source which can be used to directly
drive the device clock. It also drives a postscaler, which
can provide a range of clock frequencies from 31 kHz
to 4 MHz. INTOSC is enabled when a clock frequency
from 125 kHz to 8 MHz is selected. The INTOSC out-
put can also be enabled when 31 kHz is selected,
depending on the INTSRC bit (OSCTUNE<7>).
The other clock source is the internal RC oscillator
(INTRC), which provides a nominal 31 kHz output.
INTRC is enabled if it is selected as the device clock
source; it is also enabled automatically when any of the
following are enabled:
Power-up Timer
Fail-Safe Clock Monitor
Watchdog Timer
Two-Speed Start-up
These features are discussed in greater detail in
The clock source frequency (INTOSC direct, INTOSC
with postscaler or INTRC direct) is selected by config-
uring the IRCFx bits of the OSCCON register. The
default frequency on device Resets is 4 MHz.
3.5.1
INTIO MODES
Using the internal oscillator as the clock source elimi-
nates the need for up to two external oscillator pins,
which can then be used for digital I/O. Two distinct
oscillator configurations, which are determined by the
FOSCx Configuration bits, are available:
In INTIO1 mode, the OSC2 pin outputs FOSC/4,
while OSC1 functions as RA7 (see Figure 3-6) for
digital input and output.
In INTIO2 mode, OSC1 functions as RA7 and
OSC2 functions as RA6 (see Figure 3-7), both for
digital input and output.
FIGURE 3-6:
INTIO1 OSCILLATOR MODE
FIGURE 3-7:
INTIO2 OSCILLATOR MODE
3.5.2
INTPLL MODES
The 4x Phase Locked Loop (PLL) can be used with the
internal oscillator block to produce faster device clock
speeds than are normally possible with the internal
oscillator sources. When enabled, the PLL produces a
clock speed of 16 MHz or 32 MHz.
PLL operation is controlled through software. The con-
trol bit, PLLEN (OSCTUNE<6>), is used to enable or
disable its operation. The PLL is available only to
INTOSC when the device is configured to use one of
the INTPLL modes as the primary clock source
(FOSC<2:0> = 011 or 010). Additionally, the PLL will
only function when the selected output frequency is
either 4 MHz or 8 MHz (OSCCON<6:4> = 111 or 110).
Like the INTIO modes, there are two distinct INTPLL
modes available:
In INTPLL1 mode, the OSC2 pin outputs FOSC/4,
while OSC1 functions as RA7 for digital input and
output. Externally, this is identical in appearance
to INTIO1 (Figure 3-6).
In INTPLL2 mode, OSC1 functions as RA7 and
OSC2 functions as RA6, both for digital input and
output. Externally, this is identical to INTIO2
PIC18F87J11
OSC2
FOSC/4
I/O (OSC1)
RA7
PIC18F87J11
I/O (OSC2)
RA6
I/O (OSC1)
RA7
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