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| 型號： | DV164136 |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 8/107頁 |
| 文件大?。?/td> | 0K |
| 描述： | DEVELOPMENT KIT FOR PIC18 |
| 產(chǎn)品培訓(xùn)模塊： | PIC18 J Series MCU Overview |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PIC® |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | PIC18F8722，PIC18F87J11 |
| 所含物品： | 板，線纜，CD，PICkit? 3 個(gè)編程器，電源 |
| 產(chǎn)品目錄頁面： | 659 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | PIC18F87J11-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP PIC18F87J11T-I/PTTR-ND - IC PIC MCU FLASH 64KX16 80TQFP PIC18F8722T-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP PIC18F8722-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP PIC18F8722T-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP PIC18F8722-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP |
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2007-2012 Microchip Technology Inc.
DS39778E-page 105
PIC18F87J11 FAMILY
8.0
EXTERNAL MEMORY BUS
The External Memory Bus allows the device to access
external memory devices (such as Flash, EPROM,
SRAM, etc.) as program or data memory. It supports
both 8 and 16-Bit Data Width modes and three address
widths of up to 20 bits.
The bus is implemented with 28 pins, multiplexed
across four I/O ports. Three ports (PORTD, PORTE
and PORTH) are multiplexed with the address/data bus
for a total of 20 available lines, while PORTJ is
multiplexed with the bus control signals.
A list of the pins and their functions is provided in
TABLE 8-1:
PIC18F87J11 FAMILY EXTERNAL BUS – I/O PORT FUNCTIONS
Note:
The External Memory Bus (EMB) is not
implemented on 64-pin devices.
Name
Port
Bit
External Memory Bus Function
RD0/AD0
PORTD
0
Address Bit 0 or Data Bit 0
RD1/AD1
PORTD
1
Address Bit 1 or Data Bit 1
RD2/AD2
PORTD
2
Address Bit 2 or Data Bit 2
RD3/AD3
PORTD
3
Address Bit 3 or Data Bit 3
RD4/AD4
PORTD
4
Address Bit 4 or Data Bit 4
RD5/AD5
PORTD
5
Address Bit 5 or Data Bit 5
RD6/AD6
PORTD
6
Address Bit 6 or Data Bit 6
RD7/AD7
PORTD
7
Address Bit 7 or Data Bit 7
RE0/AD8
PORTE
0
Address Bit 8 or Data Bit 8
RE1/AD9
PORTE
1
Address Bit 9 or Data Bit 9
RE2/AD10
PORTE
2
Address Bit 10 or Data Bit 10
RE3/AD11
PORTE
3
Address Bit 11 or Data Bit 11
RE4/AD12
PORTE
4
Address Bit 12 or Data Bit 12
RE5/AD13
PORTE
5
Address Bit 13 or Data Bit 13
RE6/AD14
PORTE
6
Address Bit 14 or Data Bit 14
RE7/AD15
PORTE
7
Address Bit 15 or Data Bit 15
RH0/A16
PORTH
0
Address Bit 16
RH1/A17
PORTH
1
Address Bit 17
RH2/A18
PORTH
2
Address Bit 18
RH3/A19
PORTH
3
Address Bit 19
RJ0/ALE
PORTJ
0
Address Latch Enable (ALE) Control Pin
RJ1/OE
PORTJ
1
Output Enable (OE) Control Pin
RJ2/WRL
PORTJ
2
Write Low (WRL) Control Pin
RJ3/WRH
PORTJ
3
Write High (WRH) Control Pin
RJ4/BA0
PORTJ
4
Byte Address Bit 0 (BA0)
RJ5/CE
PORTJ
5
Chip Enable (CE) Control Pin
RJ6/LB
PORTJ
6
Lower Byte Enable (LB) Control Pin
RJ7/UB
PORTJ
7
Upper Byte Enable (UB) Control Pin
Note:
For the sake of clarity, only I/O port and external bus assignments are shown here. One or more additional
multiplexed features may be available on some pins.
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