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參數(shù)資料
型號： DSPB56364AF100
廠商： Freescale Semiconductor
文件頁數(shù)： 62/148頁
文件大小： 0K
描述： IC DSP 24BIT AUD 100MHZ 100-LQFP
標(biāo)準(zhǔn)包裝： 90
系列： DSP56K/Symphony
類型： 音頻處理器
接口： 主機接口，I²C，SAI，SPI
時鐘速率： 100MHz
非易失內(nèi)存： ROM（24 kB）
芯片上RAM： 11.25kB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 3.30V
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-LQFP（14x14）
包裝： 托盤
AC Electrical Characteristics
DSP56364 Technical Data, Rev. 4.1
3-4
Freescale Semiconductor
3.5
AC Electrical Characteristics
The timing waveforms shown in the AC electrical characteristics section are tested with a VIL maximum
of 0.3 V and a VIH minimum of 2.4 V for all pins except EXTAL, which is tested using the input levels
shown in Note 8 of the previous table. AC timing specifications, which are referenced to a device input
signal, are measured in production with respect to the 50% point of the respective input signal’s transition.
DSP56364 output levels are measured with the production test machine VOL and VOH reference levels set
at 0.4 V and 2.4 V, respectively.
NOTE
Although the minimum value for the frequency of EXTAL is 0 MHz, the
device AC test conditions are 15 MHz and rated speed.
3.6
Internal Clocks
5 This characteristic does not apply to PCAP.
6
Section 5, "Design Considerations" provides a formula to compute the estimated current requirements in Normal
mode. In order to obtain these results, all inputs must be terminated (i.e., not allowed to float). Measurements are based on
synthetic intensive DSP benchmarks. The power consumption numbers in this specification are 90% of the measured results
of this benchmark. This reflects typical DSP applications. Typical internal supply current is measured with VCC = 3.3 V at TJ
= 105°C. Maximum internal supply current is measured with VCC = 3.46 V at TJ = 105°C.
7 In order to obtain these results, all inputs must be terminated (i.e., not allowed to float). PLL signal is disabled during Stop
state.
8 In order to obtain these results, all inputs, which are not disconnected at Stop mode, must be terminated (i.e., not allowed to
float).
Table 3-4 Internal Clocks
Characteristics
Symbol
Expression1, 2
Min
Typ
Max
Internal operation frequency with PLL enabled
f
—
(Ef
× MF)/
(PDF
× DF)
—
Internal operation frequency with PLL disabled
f
—
Ef/2
—
Internal clock high period
TH
With PLL disabled
—
ETC
—
With PLL enabled and MF
≤ 40.49 × ET
C ×
PDF
× DF/MF
—0.51
× ET
C ×
PDF
× DF/MF
With PLL enabled and MF > 4
0.47
× ET
C ×
PDF
× DF/MF
—0.53
× ET
C ×
PDF
× DF/MF
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DSPB56366PV120 制造商:Motorola Inc 功能描述: 制造商:Freescale Semiconductor 功能描述:IC 制造商:MOTOROLA 功能描述:
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