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參數(shù)資料
| 型號(hào)： | DSPB56364AF100 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 116/148頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 24BIT AUD 100MHZ 100-LQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | DSP56K/Symphony |
| 類型： | 音頻處理器 |
| 接口： | 主機(jī)接口，I²C，SAI，SPI |
| 時(shí)鐘速率： | 100MHz |
| 非易失內(nèi)存： | ROM（24 kB） |
| 芯片上RAM： | 11.25kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
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Power
DSP56364 Technical Data, Rev. 4.1
Freescale Semiconductor
2-3
2.2
Power
2.3
Ground
Table 2-2 Power Inputs
Power Name
Description
VCCP
PLL Power—VCCP is VCC dedicated for PLL use. The voltage should be well-regulated and the input should
be provided with an extremely low impedance path to the VCC power rail. There is one VCCP input.
VCCLQ (4)
Quiet Core (Low) Power—VCCLQ is an isolated power for the internal processing logic. This input must be
tied externally to all other chip power inputs. The user must provide adequate external decoupling
capacitors. There are four VCCLQ inputs.
VCCHQ (4)
Quiet External (High) Power—VCCHQ is a quiet power source for I/O lines. This input must be tied
externally to all other chip power inputs. The user must provide adequate decoupling capacitors. There are
four VCCHQ inputs.
VCCA (4)
Address Bus Power—VCCA is an isolated power for sections of the address bus
I/O drivers. This input must be tied externally to all other chip power inputs. The user must provide adequate
external decoupling capacitors. There are four VCCA inputs.
VCCD (1)
Data Bus Power—VCCD is an isolated power for sections of the data bus I/O drivers. This input must be
tied externally to all other chip power inputs. The user must provide adequate external decoupling
capacitors. There is one VCCD inputs.
VCCC (1)
Bus Control Power—VCCC is an isolated power for the bus control I/O drivers. This input must be tied
externally to all other chip power inputs. The user must provide adequate external decoupling capacitors.
There is one VCCC inputs.
VCCS (3)
SHI and ESAI —VCCS is an isolated power for the SHI and ESAI. This input must be tied externally to all
other chip power inputsL. The user must provide adequate external decoupling capacitors. There are three
VCCS inputs.
Table 2-3 Grounds
Ground Name
Description
GNDP
PLL Ground—GNDP is ground-dedicated for PLL use. The connection should be provided with an
extremely low-impedance path to ground. VCCP should be bypassed to GNDP by a 0.47 μF capacitor
located as close as possible to the chip package. There is one GNDP connection.
GNDQ (4)
Quiet Ground—GNDQ is an isolated ground for the internal processing logic. This connection must be tied
externally to all other chip ground connections. The user must provide adequate external decoupling
capacitors. There are four GNDQ connections.
GNDA (4)
Address Bus Ground—GNDA is an isolated ground for sections of the address bus I/O drivers. This
connection must be tied externally to all other chip ground connections. The user must provide adequate
external decoupling capacitors. There are four GNDA connections.
GNDD (1)
Data Bus Ground—GNDD is an isolated ground for sections of the data bus I/O drivers. This connection
must be tied externally to all other chip ground connections. The user must provide adequate external
decoupling capacitors. There is one GNDD connections.
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