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參數(shù)資料
| 型號(hào)： | DSPB56364AF100 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 13/148頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 24BIT AUD 100MHZ 100-LQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | DSP56K/Symphony |
| 類型： | 音頻處理器 |
| 接口： | 主機(jī)接口，I²C，SAI，SPI |
| 時(shí)鐘速率： | 100MHz |
| 非易失內(nèi)存： | ROM（24 kB） |
| 芯片上RAM： | 11.25kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
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Serial Host Interface
DSP56364 Technical Data, Rev. 4.1
Freescale Semiconductor
2-7
2.7
Serial Host Interface
The SHI has five I/O signals that can be configured to allow the SHI to operate in either SPI or I2C mode.
Table 2-9 Serial Host Interface Signals
Signal
Name
Signal
Type
State During
Reset
Signal Description
SCK
Input or
output
Tri-stated
SPI Serial Clock—The SCK signal is an output when the SPI is configured as a master
and a Schmitt-trigger input when the SPI is configured as a slave. When the SPI is
configured as a master, the SCK signal is derived from the internal SHI clock generator.
When the SPI is configured as a slave, the SCK signal is an input, and the clock signal
from the external master synchronizes the data transfer. The SCK signal is ignored by
the SPI if it is defined as a slave and the slave select (SS) signal is not asserted. In both
the master and slave SPI devices, data is shifted on one edge of the SCK signal and is
sampled on the opposite edge where data is stable. Edge polarity is determined by the
SPI transfer protocol.
SCL
Input or
output
Tri-stated
I2C Serial Clock—SCL carries the clock for I2C bus transactions in the I2C mode. SCL
is a Schmitt-trigger input when configured as a slave and an open-drain output when
configured as a master. SCL should be connected to VCC through a pull-up resistor.
This signal is tri-stated during hardware, software, and individual reset. Thus, there is
no need for an external pull-up in this state.
This input is 5 V tolerant.
MISO
Input or
output
Tri-stated
SPI Master-In-Slave-Out—When the SPI is configured as a master, MISO is the
master data input line. The MISO signal is used in conjunction with the MOSI signal for
transmitting and receiving serial data. This signal is a Schmitt-trigger input when
configured for the SPI Master mode, an output when configured for the SPI Slave
mode, and tri-stated if configured for the SPI Slave mode when SS is deasserted. An
external pull-up resistor is not required for SPI operation.
SDA
Input or
open-drain
output
Tri-stated
I2C Data and Acknowledge—In I2C mode, SDA is a Schmitt-trigger input when
receiving and an open-drain output when transmitting. SDA should be connected to
VCC through a pull-up resistor. SDA carries the data for I
2C transactions. The data in
SDA must be stable during the high period of SCL. The data in SDA is only allowed to
change when SCL is low. When the bus is free, SDA is high. The SDA line is only
allowed to change during the time SCL is high in the case of start and stop events. A
high-to-low transition of the SDA line while SCL is high is a unique situation, and is
defined as the start event. A low-to-high transition of SDA while SCL is high is a unique
situation defined as the stop event.
This signal is tri-stated during hardware, software, and individual reset. Thus, there is
no need for an external pull-up in this state.
This input is 5 V tolerant.
MOSI
Input or
output
Tri-stated
SPI Master-Out-Slave-In—When the SPI is configured as a master, MOSI is the
master data output line. The MOSI signal is used in conjunction with the MISO signal
for transmitting and receiving serial data. MOSI is the slave data input line when the
SPI is configured as a slave. This signal is a Schmitt-trigger input when configured for
the SPI Slave mode.
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| DSPB56364FU100 | 制造商:Rochester Electronics LLC 功能描述:24 BIT AUDIO DSP - Bulk 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述: |
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| DSPB56366AG120 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC LEAD FREE DSPB56366 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSPB56366PV120 | 制造商:Motorola Inc 功能描述: 制造商:Freescale Semiconductor 功能描述:IC 制造商:MOTOROLA 功能描述: |
| DSPB56367AG150 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 150Mhz/150MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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