參數(shù)資料
型號: DS2196LN
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PQFP100
封裝: LQFP-100
文件頁數(shù): 157/160頁
文件大?。?/td> 559K
代理商: DS2196LN
DS2196
96 of 160
BAWC: BERT Alternating Word Count Rate. (Address = 44 Hex)
(MSB)
(LSB)
ALTCNT7
ALTCNT6
ALTCNT5
ALTCNT4
ALTCNT3
ALTCNT2
ALTCNT1
ALTCNT0
SYMBOL
POSITION
NAME AND DESCRIPTION
ALTCNT7
BAWC.7
Alternating Word Count Rate Bit 7. (MSB)
ALTCNT6
BAWC.6
Alternating Word Count Rate Bit 6 .
ALTCNT5
BAWC.5
Alternating Word Count Rate Bit 5.
ALTCNT4
BAWC.4
Alternating Word Count Rate Bit 4.
ALTCNT3
BAWC.3
Alternating Word Count Rate Bit 3.
ALTCNT2
BAWC.2
Alternating Word Count Rate Bit 2.
ALTCNT1
BAWC.1
Alternating Word Count Rate Bit 1.
ALTCNT0
BAWC.0
Alternating Word Count Rate Bit 0. (LSB)
When the BERT is programmed in the alternating word mode, the words will repeat for the count loaded
into this register then flip to the other word and again repeat for the number of times loaded into this
register.
BRP0: BERT Repetitive Pattern Set Register 0 (Address = 45 Hex)
BRP1: BERT Repetitive Pattern Set Register 1 (Address = 46 Hex)
BRP2: BERT Repetitive Pattern Set Register 2 (Address = 47 Hex)
BRP3: BERT Repetitive Pattern Set Register 3 (Address = 48 Hex)
(MSB)
(LSB)
RPAT7
RPAT6
RPAT5
RPAT4
RPAT3
RPAT2
RPAT1
RPAT0
BRP0
RPAT15
RPAT14
RPAT13
RPAT12
RPAT11
RPAT10
RPAT9
RPAT8
BRP1
RPAT23
RPAT22
RPAT21
RPAT20
RPAT19
RPAT18
RPAT17
RPAT16
BRP2
RPAT31
RPAT30
RPAT29
RPAT28
RPAT27
RPAT26
RPAT25
RPAT24
BRP3
SYMBOL
POSITION
NAME AND DESCRIPTION
RPAT31
BERTRP3.7
MSB of the 32–bit Repetitive Pattern Set
RPAT0
BERTRP0.0
LSB of the 32–bit Repetitive Pattern Set
BERT Repetitive Pattern Set.
These registers must be properly loaded for the BERT to properly
generate and synchronize to a repetitive pattern, a pseudorandom pattern, alternating word pattern, or a
Daly pattern. For a repetitive pattern that is less than 32 bits, then the pattern should be repeated so that
all 32 bits are used to describe the pattern. For example if the pattern was the repeating 5-bit pattern
…01101… (where the right most bit is the one sent first and received first) then BRP0 should be loaded
with ADh, BRP1 with B5h, BRP2 with D6h,
and BRP3 should be loaded with 5Ah.
For a
pseudorandom pattern, all four registers should be loaded with all 1’s (i.e. xFF). For an alternating word
pattern, one word should be placed into BRP0 and BRP1 and the other word should be placed into BRP2
and BRP3. For example, if the DDS stress pattern "7E" is to be described, the user would place 00h in
BRP0, 00h in BRP1, 7Eh in BRP2, and 7Eh in BRP3 and the alternating word counter would be set to 50
(decimal) to allow 100 bytes of 00h followed by 100 bytes of 7Eh to be sent and received.
相關(guān)PDF資料
PDF描述
DS21FF44 DATACOM, FRAMER, PBGA300
DS21FF44N DATACOM, FRAMER, PBGA300
DS21FT40N DATACOM, FRAMER, PBGA300
DS21FT40 DATACOM, FRAMER, PBGA300
DS21FT42 DATACOM, FRAMER, PBGA300
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