參數(shù)資料
型號： DS21348GN
廠商： DALLAS SEMICONDUCTOR
元件分類： Digital Transmission Interface
英文描述： DATACOM, PCM TRANSCEIVER, BGA49
封裝： CABGA-49
文件頁數(shù)： 27/44頁
文件大小： 1078K
代理商： DS21348GN
MAX8660/MAX8660A/MAX8660B/MAX8661MAX8660/MAX8660A/MAX8660B/MAX8661
High-Efficiency, Low-IQ, PMICs with Dynamic
Voltage Management for Mobile Applications
33
where VLBOR is the rising voltage at the top of R1 (typi-
cally VIN) when LBO goes high, and VLBOF is the falling
voltage at the top of R1 when LBO goes low.
For example, to set VLBOR to 3.6V and VLBOF to 3.2V,
choose R3 to be 1M
. Then, R1 = 1.8M and
R2 = 80k
.
If the low-battery-detector feature is not required, con-
nect LBO to ground and connect LBF and LBR to IN.
Internal Off-Discharge Resistors
Each regulator on the MAX8660/MAX8661 has an inter-
nal resistor that discharges the output capacitor when
the regulator is off (Table 8). The internal discharge
resistors pull their respective output to ground when the
regulator is off, ensuring that load circuitry always pow-
ers down completely. The internal off-discharge resis-
tors are active when a regulator is disabled, when the
device is in OVLO, and when the device is in UVLO
with VIN greater than 1.0V. With VIN less than 1.0V, the
internal off-discharge resistors may not activate.
Thermal-Overload Protection
Thermal-overload protection limits total power dissipa-
tion in the MAX8660/MAX8661. When internal thermal
sensors detect a die temperature in excess of +160
°C,
the corresponding regulator(s) are shut down, allowing
the IC to cool. The regulators turn on again after the
junction cools by 15
°C, resulting in a pulsed output dur-
ing continuous thermal-overload conditions.
A thermal overload on any of REG1 through REG5 only
shuts down the overloaded regulator. An overload on
REG6 or REG7 shuts down both regulators together.
During thermal overload, REG8 is not turned off, and
the I2C interface and voltage monitors remain active.
I2C Interface
An I2C-compatible, 2-wire serial interface controls a
variety of MAX8660/MAX8661 functions:
The output voltages of V3–V7 are set by the serial
interface.
Each of the four step-down DC-DC converters
(REG1–REG4) can be put into forced-PWM operation.
REG3 and REG4 can be enabled by the serial inter-
face or by a hardware-enable pin (EN34). See the
REG3/REG4 Enable (EN34, EN3, EN4) section for
more information.
REG6 and REG7 are activated only by the serial interface.
The serial interface operates whenever VIN is between
VUVLO (typically 2.40V) and VOVLO (typically 6.35V).
When VIN is outside the I2C operation range, the I2C
registers are reset to their default values.
The serial interface consists of a bidirectional serial-data
line (SDA) and a serial-clock input (SCL). The MAX8660/
MAX8661 are slave-only devices, relying upon a master
to generate a clock signal. The master (typically the
applications processor) initiates data transfer on the bus
and generates SCL to permit data transfer.
I2C is an open-drain bus. SDA and SCL require pullup
resistors (500
or greater). Optional resistors (24) in
series with SDA and SCL protect the device inputs from
high-voltage spikes on the bus lines. Series resistors also
minimize cross-talk and undershoot on bus signals.
The Marvell PXA3xx specification contains an extensive
list of registers for various functions, not all of which are
provided on the MAX8660/MAX8661. The list in Table 9 is
a subset of the Marvell list as it relates to functions includ-
ed in the PMIC. Even though the MAX8660/MAX8661 use
a subset of the specified registers, they acknowledge
writes to the entire register space (0x00 to 0xFF).
In Marvell PXA3xx applications, the pullups are typically
to
VCC_IOx.
Data Transfer
One data bit is transferred during each SCL clock
cycle. The data on SDA must remain stable during the
high period of the SCL clock pulse. Changes in SDA
while SCL is high are control signals (see the
START
and STOP Conditions section for more information).
Each transmit sequence is framed by a START (S) condi-
tion and a STOP (P) condition. Each data packet is 9 bits
long; 8 bits of data followed by the acknowledge bit. The
MAX8660/MAX8661 suport data transfer rates with SCL
frequencies up to 400kHz.
REGULATOR
INTERNAL OFF-DISCHARGE
RESISTOR VALUE
REG1
650
±30%
REG2
650
±30%
REG3
550
±30%
REG4
550
±30%
REG5
2k
±30%
REG6
350
±30%
REG7
350
±30%
REG8
1.5k
±30%
Table 8. Internal Off-Discharge Resistor
相關(guān)PDF資料
PDF描述
DS21348T DATACOM, PCM TRANSCEIVER, PQFP44
DS21348TN DATACOM, PCM TRANSCEIVER, PQFP44
DS21348G DATACOM, PCM TRANSCEIVER, BGA49
DS21Q348N DATACOM, PCM TRANSCEIVER, PBGA144
DS21Q348 DATACOM, PCM TRANSCEIVER, PBGA144
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS21348GN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3V E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21348GNB 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21348GN-C01 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3V E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21348T 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3V E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21348T+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3V E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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