參數(shù)資料
型號(hào): DS21348GN
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Interface
英文描述: DATACOM, PCM TRANSCEIVER, BGA49
封裝: CABGA-49
文件頁(yè)數(shù): 11/44頁(yè)
文件大?。?/td> 1078K
代理商: DS21348GN
MAX8660/MAX8660A/MAX8660B/MAX8661
High-Efficiency, Low-IQ, PMICs with Dynamic
Voltage Management for Mobile Applications
19
Pin Description
PIN
MAX8660 MAX8661
NAME
FUNCTION
1
IN5
REG5 Power Input. Connect IN5 to IN to ensure V5 rises first to meet the Marvell PXA3xx
processor’s sequencing requirements. If adherence to this sequencing specification is not
required, connect IN5 to V1, V2, or another supply between 2.35V and VIN. See the Linear
Regulators (REG5–REG8) section for more information.
2
V5
REG5 Linear-Regulator Output. V5 defaults to 1.8V and is adjustable from 1.7V to 2.0V through
the serial interface. The input to the V5 regulator is IN5. Use V5 to power VCC_MVT, VCC_BG,
VCC_OSC13M, and VCC_PLL on Marvell PXA3xx processors. V5 is internally pulled to AGND
through 2k
when REG5 is shut down.
3
PV4
REG4 Power Input. Connect a 4.7F ceramic capacitor from PV4 to PG4. All PV pins and IN must
be connected together externally.
4
LX4
REG4 Switching Node. Connect LX4 to the REG4 inductor. LX4 is high impedance when REG4 is
shut down.
5
PG4
REG4 Power Ground. Connect PG1, PG2, PG3, PG4, and AGND together. Refer to the MAX8660 EV
kit data sheet for more information.
6
SET2
REG2 Voltage Select Input. SET2 is a tri-level logic input. Connect SET2 to select the V2 output
voltage as detailed in Table 4. The REG2 output voltage selected by SET2 is latched at the end of
the REG2 soft-start period. Changes to SET2 after the startup period have no effect.
7
V6
REG6 Linear-Regulator Output. REG6 is activated and programmed through the serial interface to
output from 1.8V to 3.3V in 0.1V steps. REG6 is off by default. V6 is internally pulled to AGND
through 350
when REG6 is shut down. V6 optionally powers VCC_CARD1 on Marvell PXA3xx
processors.
8
IN67
REG6 and REG7 Power Input. IN67 is typically connected to IN. IN67 can also be connected to
any supply between 2.35V to VIN.
8
IN6
REG6 Power Input. IN6 is typically connected to IN. IN6 can also be connected to any supply
between 2.35V to VIN.
9
V7
REG7 Linear-Regulator Output. REG7 is activated and programmed through the serial interface to
output from 1.8V to 3.3V in 0.1V steps. REG7 is off by default. V7 is internally pulled to AGND
through 350
when REG7 is shut down. V7 optionally powers VCC_CARD2 on Marvell PXA3xx
processors.
9
N.C.
No Internal Connection
10
V2
REG2 Voltage Sense Input. Connect V2 directly to the REG2 output voltage. The output voltage of
REG2 is selected by SET2. V2 is internally pulled to AGND through 650
when REG2 is shut
down. V2 powers VCC_MEM on Marvell PXA3xx processors.
11
SCL
Serial-Clock Input. See the I2C Interface section.
12
SDA
Serial-Data Input. See the I2C Interface section.
13
LBO
Low-Battery Output. LBO is an open-drain output that pulls low when LBF is below its threshold.
LBO typically connects to the nBATT_FAULT input of the applications processor to indicate that
the battery has been removed or discharged.
14
PV2
REG2 Power Input. Connect a 4.7F ceramic capacitor from PV2 to PG2. All PV pins and IN must
be connected together externally.
15
LX2
REG2 Switching Node. Connect LX2 to the REG2 inductor. LX2 is high impedance when REG2 is
shut down.
相關(guān)PDF資料
PDF描述
DS21348T DATACOM, PCM TRANSCEIVER, PQFP44
DS21348TN DATACOM, PCM TRANSCEIVER, PQFP44
DS21348G DATACOM, PCM TRANSCEIVER, BGA49
DS21Q348N DATACOM, PCM TRANSCEIVER, PBGA144
DS21Q348 DATACOM, PCM TRANSCEIVER, PBGA144
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DS21348GN-C01 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3V E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21348T 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3V E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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