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參數(shù)資料
| 型號： | DS1963L-F5 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Memory IC:Other |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, MEDB2 |
| 封裝： | MICROCAN-2 |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 482K |
| 代理商： | DS1963L-F5 |
DS1963L
14 of 24
HARDWARE CONFIGURATION Figure 8
1-WIRE BUS SYSTEM
The 1-Wire bus is a system which has a single bus master and one or more slaves. In all instances the
DS1963L is a slave device. The bus master is typically a microcontroller. The discussion of this bus
system is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire
signaling (signal types and timing). A 1-Wire protocol defines bus transactions in terms of the bus state
during specific time slots that are initiated on the falling edge of sync pulses from the bus master. For a
more detailed protocol description, refer to Chapter 4 of the Book of DS19xx iButton Standards.
HARDWARE CONFIGURATION
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open
drain or 3-state outputs. The 1-Wire port of the DS1963L is open drain with an internal circuit equivalent
to that shown in Figure 8. A multidrop bus consists of a 1-Wire bus with multiple slaves attached. At
regular speed the 1-Wire bus has a maximum data rate of 16.3 kbits per second. The speed can be
boosted to 142 kbits per second by activating the Overdrive mode. The 1-Wire bus requires a pullup
resistor of approximately 5 k
.
The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus
MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low
for more than 16
s (Overdrive speed) or more than 120 s (regular speed), one or more devices on the
bus may be reset.
TRANSACTION SEQUENCE
The protocol for accessing the DS1963L via the 1-Wire port is as follows:
Initialization
ROM Function Command
Memory Function Command
Transaction/Data
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS1963S | SPECIALTY MEMORY CIRCUIT, MEDB2 |
| DS1985-F3 | 2K X 8 EEPROM 3V, RDB2 |
| DS1986-F3 | 64K X 1 OTPROM, MEDB2 |
| DS1986-F5 | 64K X 1 OTPROM, MADB2 |
| DS1991L-F5 | SPECIALTY MEMORY CIRCUIT, MEDB2 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1963L-F5+ | 功能描述:iButton RoHS:否 存儲類型:SRAM 存儲容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1963L-F5+W | 功能描述:iButton RoHS:否 存儲類型:SRAM 存儲容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1963R-F5+ | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
| DS1963S | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:SHA iButton |
| DS1963S+F5 | 制造商:Maxim Integrated Products 功能描述:SHA IBTN 8SOIC - Rail/Tube |
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