參數(shù)資料
型號(hào): DS1875T+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 26/92頁(yè)
文件大小: 0K
描述: IC SFP CTRLR/TRIPLEXER 38-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 90
應(yīng)用: 光纖
接口: I²C
電源電壓: 2.85 V ~ 3.9 V
封裝/外殼: 38-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 38-TQFN(5x7)
包裝: 管件
安裝類型: 表面貼裝
產(chǎn)品目錄頁(yè)面: 1431 (CN2011-ZH PDF)
DS1875
PON Triplexer and SFP Controller
32
______________________________________________________________________________________
Shadowed EEPROM
Many NV memory locations (listed within the
Register
Descriptions section) are actually shadowed EEPROM
that are controlled by the SEEB bit in Table 02h, Byte
80h.
The DS1875 incorporates shadowed-EEPROM memory
locations for key memory addresses that can be written
many times. By default the shadowed-EEPROM bit,
SEEB, is not set and these locations act as ordinary
EEPROM. By setting SEEB, these locations function like
SRAM cells, which allow an infinite number of write
cycles without concern of wearing out the EEPROM.
This also eliminates the requirement for the EEPROM
write time, tWR. Because changes made with SEEB dis-
abled do not affect the EEPROM, these changes are
not retained through power cycles. The power-on value
is the last value written with SEEB enabled. This func-
tion can be used to limit the number of EEPROM writes
during calibration or to change the monitor thresholds
periodically during normal operation helping to reduce
the number of times EEPROM is written. The
Memory
Map description indicates which locations are shad-
owed EEPROM.
ATB
MISC. CONTROL
BITS
EEPROM
FFh
I2C SLAVE ADDRESS A0h
(FIXED)
00h
FFh
80h
F8h
PW1 LEVEL ACCESS
EEPROM
(120 BYTES)
TABLE 01h
AUXILIARY MEMORY
FFh
F7h
D7h
F7h
FFh
80h
89h
NO MEMORY
MON5–MON8 CONV
TABLE 00h
88h
80h
F8h
D8h
CONFIGURATION AND
CONTROL
NO MEMORY
TABLE 02h
FFh
80h
PW2 LEVEL ACCESS
EEPROM
(128 BYTES)
TABLE 03h
C7h
80h
MODULATION
LUT
TABLE 04h
A3h
80h
APC TE LUT
TABLE 05h
9Fh
80h
M4DAC LUT
TABLE 06h
DEC
0
HEX
0h
DEC
128
HEX
80h
255
FFh
255
FFh
A3h
80h
PWM REF LUT
TABLE 07h
C7h
80h
BIAS
OPEN-LOOP
LUT
TABLE 08h
TABLE SELECT BYTE
PASSWORD ENTRY (PWE)
(7Bh–Eh)
PW2 LEVEL ACCESS
EEPROM
(48 BYTES)
DIGITAL DIAGNOSTIC
FUNCTIONS
DIGITAL DIAGNOSTIC
FUNCTIONS
7Fh
7Ah
5Fh
2Fh
I2C SLAVE ADDRESS A2h
(DEFAULT)
00h
30h
60h
LOWER MEMORY
Figure 16. Memory Map
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