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參數(shù)資料
| 型號： | DP83848HSQ/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 30/82頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX ETHERNET PHYTER 40-LLP |
| 產(chǎn)品培訓模塊： | PHYTER® Family |
| 標準包裝： | 1 |
| 類型： | 收發(fā)器 |
| 驅動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | 以太網(wǎng) |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 40-LLP-EP（6x6） |
| 包裝： | 剪切帶 (CT) |
| 配用： | DP83848H-MAU-EK-ND - BOARD EVALUATION DP83848H |
| 其它名稱： | *DP83848HSQ/NOPB DP83848HSQCT |
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DP
83
84
8
H
5.4 Power Feedback Circuit
To ensure correct operation for the DP83848H, parallel
caps with values of 10
F (Tantalum) and 0.1 F should
be placed close to pin 19 (PFBOUT) of the device.
Pin 16 (PFBIN1) and pin 30 (PFBIN2) must be connected
to pin 19 (PFBOUT), each pin requires a small capacitor
(0.1
F). See Figure 13 below for proper connections.
5.5 Power Down
The device can be put in a Power Down mode by setting
bit 11 (Power Down) in the Basic Mode Control Register,
BMCR (0x00h).
5.6 Energy Detect Mode
When Energy Detect is enabled and there is no activity on
the cable, the DP83848H will remain in a low power mode
while monitoring the transmission line. Activity on the line
will cause the DP83848H to go through a normal power
up sequence. Regardless of cable activity, the DP83848H
will occasionally wake up the transmitter to put ED pulses
on the line, but will otherwise draw as little power as possi-
ble. Energy detect functionality is controlled via register
Energy Detect Control (EDCR), address 0x1Dh.
6.0 Reset Operation
The DP83848H includes an internal power-on reset
(POR) function and does not need to be explicitly reset for
normal operation after power up. If required during normal
operation, the device can be reset by a hardware or soft-
ware reset.
6.1 Hardware Reset
A hardware reset is accomplished by applying a low pulse
(TTL level), with a duration of at least 1
s, to the
RESET_N. This will reset the device such that all registers
will be reinitialized to default values and the hardware
configuration values will be re-latched into the device
(similar to the power-up/reset operation).
6.2 Software Reset
A software reset is accomplished by setting the reset bit
(bit 15) of the Basic Mode Control Register (BMCR). The
period from the point in time when the reset bit is set to the
point in time when software reset has concluded is
approximately 1
s.
The software reset will reset the device such that all regis-
ters will be reset to default values and the hardware con-
figuration values will be maintained. Software driver code
must wait 3
s following a software reset before allowing
further serial MII operations with the DP83848H.
0.1
F
10
F
Pin 19 (PFBOUT)
0.1
F
0.1
F
Pin 16 (PFBIN1)
Pin 30 (PFBIN2)
+
-
Figure 13. Power Feeback Connection
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|---|---|
| DP83848I | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Industrial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver |
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| DP83848I-MAU-EK | 功能描述:BOARD EVALUATION DP83848I RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| DP83848I-MAU-EK/NOPB | 功能描述:以太網(wǎng)開發(fā)工具 DP83848 MAU CARD IND TEMP RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| DP83848I-POE-EK | 功能描述:以太網(wǎng)開發(fā)工具 DP83848 POE CARD IND TEMP RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
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