參數(shù)資料
型號(hào)： DNC3X3625
廠商： Lineage Power
英文描述： Hex 10/100 Mbits/s Ethernet Transceiver Macrocell(六通道 10M位/秒和100 M位/秒以太網(wǎng)收發(fā)器宏單元)
中文描述： 六角10/100 Mbits /秒以太網(wǎng)收發(fā)器宏單元（六通道1000萬(wàn)位/秒和100海里位/秒以太網(wǎng)收發(fā)器宏單元）
文件頁(yè)數(shù)： 11/32頁(yè)
文件大?。?/td> 464K
代理商： DNC3X3625
Advance Data Sheet
March 2000
DNC3X3625
10/100 Mbits/s Ethernet Transceiver Macrocell
11
4
FASTTEST
I
Fast Test
. This signal should be low for normal operation. When high, the
internal timers run faster than normal, with the speedup determined by
FASTSEL[1:0]
Fast Speed Select.
When FASTTEST is high, the speedup of the timers
(10 Mbit/s NLP link, 10 Mbit/s jabber, reset timers, autonegotiation counters)
is as follows:
00 = No speedup.
01 = 16x speedup.
10 = 64x speedup.
11 = 256x speedup. (Autonegotiation does not work at this speedup.)
Enhanced Link Integrity Test Function.
When this input is high, The link
will be deasserted when 31 Manchester violations have occurred.
SDFX.
Signal detect from fiber-optic receiver. This pad does not have to be
bonded out if fiber mode is not used.
Security.
When this input is high and MTX_EN is high, JAM pattern (55) is
transmitted.
Isolate.
When this signal is high, the macrocell will come out of reset in
isolate mode per the IEEEstandard. If this is low, then the macrocell will
come out of reset in normal mode. When isolated, all receive outputs are
low, and all transmit requests are ignored. While isolated, the macrcell will
respond to management transactions, detect, and transmit link pulses.
Register 0, bit 10, is used to put the transceiver in/out of isolate mode.
Autopolarity Function Enable (Active Low).
When this signal is set low
and the DNC3X3625 is operating at 10 Mbits/s, the autopolarity function will
determine if the TP link is wired with a polarity reversal:
FASTSEL[1:0]
I
LITF_ENH
I
SDFX[5:0]
PAD
(optional I)
I
SECUR[5:0]
ISOLATE[5:0]
I
APFE_PIN[5:0]
I
I
The DNC3X3625 will assert the autopolarity status (APS) bit (register 28,
bit 6) and correct the polarity reversal.
I
If this signal is set high and the DNC3X3625 is operating at 10 Mbits/s,
the reversal will not be corrected.
Extended Line Length Enable.
When this signal is set high, the receive
squelch level is reduced from a nominal 435 mV to 350 mV, allowing recep-
tion of signals with lower amplitude. This is the same function as register 30,
bit 4. The input and the register bit are ORed together.
Heartbeat Enable.
When asserted high, this input will enable the heartbeat
function (serial mode). This is the same function as register 30, bit 5. The
input and the register bit are ORed together.
Loopback.
When this signal is asserted high DNC3X3625 is in loopback
mode. No data transmission will take place on the media and any receive
data will be ignored. This is the same function as register 0, bit 14. The input
and the register bit are ORed together.
No Link Pulse Mode.
Setting this signal high will allow 10 Mbits/s operation
with link pulses disabled. If the DNC3X3625 is configured for
100 Mbits/s operation, this signal is ignored. This is the same function as
register 30, bit 0. The input and the register bit are ORed together.
LED Stretch Enable.
This pin, when low, disables stretching. When high,
the LED output is stretched to 42 ms minimum, unless LED_BLINK_EN is
high. This signal is ORed with register 29, bit 7.
ELLE_PIN[5:0]
I
HBT_PIN[5:0]
I
LPBK_PIN[5:0]
I
NOLP_PIN[5:0]
I
LED_STR_EN
I
Signal
Type
Description
Signal Information
(continued)
Table 6. Control/Status Signals
(continued)
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