on the positive input (IIN+
參數(shù)資料
型號(hào)： DC798B
廠商： Linear Technology
文件頁數(shù)： 22/42頁
文件大?。?/td> 0K
描述： BOARD DELTA SIGMA ADC LTC2480
軟件下載： QuikEval System
設(shè)計(jì)資源： DC798B Design File
DC798B Schematic
標(biāo)準(zhǔn)包裝： 1
系列： QuikEval™
ADC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 7.5
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
已用 IC / 零件： LTC2480
已供物品： 板
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LTC2480
2480fd
The switching algorithm forces the average input current
on the positive input (IIN+) to be equal to the average input
current on the negative input (IIN–). Over the complete
conversion cycle, the average differential input current
(IIN+ – IIN–) is zero. While the differential input current
is zero, the common mode input current (IIN++ IIN–)/2 is
proportional to the difference between the common mode
input voltage (VINCM) and the common mode reference
voltage (VREFCM).
In applications where the input common mode voltage
is equal to the reference common mode voltage, as in
the case of a balance bridge type application, both the
differential and common mode input current are zero.
The accuracy of the converter is unaffected by settling
errors. Mismatches in source impedances between IN+
and IN– also do not affect the accuracy.
In applications where the input common mode voltage is
constant but different from the reference common mode
voltage, the differential input current remains zero while
the common mode input current is proportional to the
difference between VINCM and VREFCM. For a reference
common mode of 2.5V and an input common mode of
1.5V, the common mode input current is approximately
0.74A (in simultaneous 50Hz/60Hz rejection mode). This
common mode input current has no effect on the accuracy
if the external source impedances tied to IN+ and IN– are
matched. Mismatches in these source impedances lead
to a fixed offset error but do not affect the linearity or full-
scale reading. A 1% mismatch in 1k source resistances
leads to a 15ppm shift (74V) in offset voltage.
In applications where the common mode input voltage
varies as a function of input signal level (single-ended
input, RTDs, half bridges, current sensors, etc.), the
common mode input current varies proportionally with
input voltage. For the case of balanced input impedances,
the common mode input current effects are rejected by the
large CMRR of the LTC2480 leading to little degradation in
accuracy. Mismatches in source impedances lead to gain
errors proportional to the difference between the common
mode input voltage and the common mode reference
voltage. 1% mismatches in 1k source resistances lead to
worst-case gain errors on the order of 15ppm or 1LSB
(for 1V differences in reference and input common mode
applicaTions inForMaTion
CEXT
2480 F12
VINCM + 0.5VIN
RSOURCE
IN+
LTC2480
CPAR
20pF
CEXT
VINCM – 0.5VIN
RSOURCE
IN–
CPAR
20pF
Figure 12. An RC Network at IN+ and IN–
RSOURCE ()
1
+FS
ERROR
(ppm)
–20
0
20
1k
100k
2480 F13
–40
–60
–80
10
100
10k
40
60
80
VCC = 5V
VREF = 5V
VIN+ = 3.75V
VIN– = 1.25V
FO = GND
TA = 25°C
CEXT = 0pF
CEXT = 100pF
CEXT = 1nF, 0.1F, 1F
Figure 13. +FS Error vs RSOURCE at IN+ or IN–
RSOURCE ()
1
–FS
ERROR
(ppm)
–20
0
20
1k
100k
2480 F14
–40
–60
–80
10
100
10k
40
60
80
VCC = 5V
VREF = 5V
VIN+ = 1.25V
VIN– = 3.75V
FO = GND
TA = 25°C
CEXT = 0pF
CEXT = 100pF
CEXT = 1nF, 0.1F, 1F
Figure 14. –FS Error vs RSOURCE at IN+ or IN–
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