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參數(shù)資料
| 型號(hào)： | DC798B |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 14/42頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2480 |
| 軟件下載： | QuikEval System |
| 設(shè)計(jì)資源： | DC798B Design File DC798B Schematic |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuikEval™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 7.5 |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 已用 IC / 零件： | LTC2480 |
| 已供物品： | 板 |
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LTC2480
2480fd
Input signals applied to IN+ and IN– pins may extend by
300mV below ground and above VCC. In order to limit any
fault current, resistors of up to 5k may be added in series
withtheIN+andIN–pinswithoutaffectingtheperformance
of the devices. The effect of the series resistance on the
converter accuracy can be evaluated from the curves
presentedintheInputCurrent/ReferenceCurrentsections.
In addition, series resistors will introduce a temperature
dependent offset error due to the input leakage current.
A 1nA input leakage current will develop a 1ppm offset
error on a 5k resistor if VREF = 5V. This error has a very
strong temperature dependency.
Serial Interface Timing Modes
The LTC2480’s 4-wire interface is SPI and MICROWIRE
compatible. This interface offers several flexible modes of
operation. These include internal/external serial clock,
3-or4-wireI/O,singlecycleorcontinuousconversion.The
following sections describe each of these serial interface
timing modes in detail. In all these cases, the converter
can use the internal oscillator (fO = LOW or fO = HIGH)
or an external oscillator connected to the fO pin. Refer to
Table 6 for a summary.
External Serial Clock, Single Cycle Operation
(SPI/MICROWIRE Compatible)
This timing mode uses an external serial clock to shift
out the conversion result and a CS signal to monitor and
control the state of the conversion cycle, see Figure 5.
The serial clock mode is selected on the falling edge
of CS. To select the external serial clock mode, the
serial clock pin (SCK) must be LOW during each CS
falling edge.
applicaTions inForMaTion
Table 6. LTC2480 Interface Timing Modes
CONFIGURATION
SCK SOURCE
CONVERSION
CYCLE CONTROL
DATA OUTPUT
CONTROL
CONNECTION
AND WAVEFORMS
External SCK, Single Cycle Conversion
External
CS and SCK
Figures 5, 6
External SCK, 3-Wire I/O
External
SCK
Figure 7
Internal SCK, Single Cycle Conversion
Internal
CS
↓
CS
↓
Figures 8, 9
Internal SCK, 3-Wire I/O, Continuous Conversion
Internal
Continuous
Internal
Figure 10
EOC
BIT 23
SDO
SCK
(EXTERNAL)
CS
EN
GS2
GS1
GS0
IM
FA
FB
SPD
SDI*
DON’T CARE
TEST EOC
IM
MSB
SIG
BIT 0
LSB
BIT 4
BIT 19
BIT 18
BIT 17
BIT 16
BIT 20
BIT 21
BIT 22
SLEEP
DATA OUTPUT
CONVERSION
2480 F05
CONVERSION
Hi-Z
TEST EOC
VCC
FO
VREF
IN+
IN–
SCK
SDI
SDO
CS
GND
2
10
INT/EXT CLOCK
3
4
5
9
7
8
6
1
REFERENCE
VOLTAGE
0.1V TO VCC
ANALOG
INPUT
1F
2.7V TO 5.5V
LTC2480
4-WIRE
SPI INTERFACE
DON’T CARE
TEST EOC
(OPTIONAL)
Figure 5. External Serial Clock, Single Cycle Operation
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