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| 型號(hào)： | DAC1627D1G25HN |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類(lèi)： | 外設(shè)及接口 |
| 英文描述： | Dual 16-bit DAC, up to 1.25 Gsps; 2x 4x and 8x interpolating |
| 封裝： | DAC1627D1G25HN/C1<SOT813-3 (HVQFN72)|<<http://www.nxp.com/packages/SOT813-3.html<1<Always Pb-free,; |
| 文件頁(yè)數(shù)： | 58/69頁(yè) |
| 文件大小： | 1677K |
| 代理商： | DAC1627D1G25HN |
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DAC1627D1G25
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 — 29 April 2011
58 of 69
NXP Semiconductors
DAC1627D1G25
Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating
2
LDAB_SWAP
R/W
swaps LVDS A and LVDS B paths
normal operation
LVDS A and LVDS B paths are swapped
specify IQ supplied format
folded
interleaved
specify sampling edge for LVDS data path
falling edge of LDCLK
rising edge of LDCLK
0
1
1
IQ_FORMAT
R/W
0
1
0
EDGE_LDCLK
R/W
0
1
Table 88.
Default values are shown highlighted.
Bit
Symbol
Register LD_CNTRL (address 0Ah)
…continued
Access
Value
Description
Table 89.
Default values are shown highlighted.
Bit
Symbol
7
SR_CDI
Register MISC_CNTRL (address 0Bh)
Access
R/W
Value
Description
CDI block software reset control
no action
perform a software reset on CDI
reserved
specifies output from CDI for I path
normal operation (CDI data output sent to digital
signal processing input)
if LDVS data enable = 1, then normal operation; if
LDVS data enable = 0, then digital signal processing
input = I_DC_LEVEL register value
digital signal processing input = I_DC_LEVEL
digital signal processing input = I_DC_LEVEL
specifies output from CDI for Q path
normal operation (CDI data output sent to digital
signal processing input)
if LDVS data enable = 1, then normal operation; if
LDVS data enable = 0, then digital signal processing
input = Q_DC_LEVEL register value
digital signal processing input = Q_DC_LEVEL
digital signal processing input = Q_DC_LEVEL
specifies CDI mode
cdi_mode 0 (
×
2 mode)
cdi_mode 1 (
×
4 mode)
cdi_mode 2 (
×
8 mode)
not used
0
1
0
6
5 to 4
RESERVED
I_LEV_CNTRL[1:0]
R/W
R/W
00
01
10
11
3 to 2
Q_LEV_CNTRL[1:0]
R/W
00
01
10
11
1 to 0
CDI_MODE[1:0]
R/W
00
01
10
11
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DAC1627D1G25HN/C1, | 功能描述:調(diào)節(jié)器/解調(diào)器 DUAL 16b 1.25GSPS to 1.25 Gsps RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| DAC1627D1G25HN/C1,551 | 功能描述:調(diào)節(jié)器/解調(diào)器 Dual 16-bit DAC, up to 1.25 Gsps RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| DAC1627D1G25HN-C1 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC1627D1G25HN-C18 | 制造商:Integrated Device Technology Inc 功能描述:HVQFN72 - Tape and Reel |
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