參數(shù)資料
型號(hào): DAC1627D1G25HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 16-bit DAC, up to 1.25 Gsps; 2x 4x and 8x interpolating
封裝: DAC1627D1G25HN/C1<SOT813-3 (HVQFN72)|<<http://www.nxp.com/packages/SOT813-3.html<1<Always Pb-free,;
文件頁(yè)數(shù): 36/69頁(yè)
文件大小: 1677K
代理商: DAC1627D1G25HN
DAC1627D1G25
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 — 29 April 2011
36 of 69
NXP Semiconductors
DAC1627D1G25
Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating
10.16.4
IQ-modulator - AC interface
When the IQ-modulator common-mode voltage is close to ground, the DAC1627D1G25
must be used AC-coupled and the auxiliary DACs are required for local oscillator
cancellation.
Figure 29
shows an example of a connection to an IQ-modulator with a 0.5 V common
input level and auxiliary DACs.
10.17 Design recommendations
10.17.1
Power and grounding
Use a separate power supply regulator for the generation of the 1.8 V analog power
(pins 65, 62, 55, 69, 72 and 58) and the 1.8 V digital power (pins 12, 19, 36, 26 and 43) to
ensure optimal performance.
Also, include individual LC decoupling for the following six sets of power pins:
V
DDA(1V8)_P1
(pin 62)
V
DDA(1V8)_P2
(pin 65)
V
DDA(1V8)
(pins 55, 69, 72 and 58)
V
DDD(1V8)
(core: pins 12, 26 and 43)
V
DDD(1V8)
(LVDS: pins 19 and 36)
V
DDA(3V3)
(pins 59 and 68)
At least two capacitors must be used for each power pin decoupling. These capacitors
must be located as close as possible to the DAC1627D1G25 power pins.
Fig 29. IQ-modulator: AC interface with a 0.5 V common input level and auxiliary DACs
IOUTAP/IOUTBP
3.3 V
DAC1627D
65.5 Ω
65.5 Ω
5 V
2 kΩ
2 kΩ
34 Ω
34 Ω
174 Ω
174 Ω
IOUTAN/IOUTBN
AUXAP/AUXBP
AUXAN/AUXBN
BBAP/BBBP
BBAP/BBAN
BBBP/BBBN
V
I(cm)
= 0.5 V
V
I(dif)
= 1.96 V
offset correction = up to 70 mV
IOUTAP/IOUTAN
IOUTBP/IOUTBN
V
O(cm)
= 2.65 V
V
O(dif)
= 1.96 V
BBAN/BBBN
001aan842
10 nF
10 nF
0 mA to 20 mA
1.1 mA (typical)
IQ-modulator (V
I(cm)
= 0.5 V)
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