
26
Altera Corporation
Storage Functions
lpm_ff
Parameterized D or T Flipflop
Ports
Name
Type
Required
Description
aload
Input
No
Asynchronous load input. Asynchronously loads the flipflop with the value on 
the 
data[]
 input. Default = 0. If 
aload
 is used, 
data[]
 must be used.
Synchronous set input. Sets the 
q[]
 outputs to the value specified by 
LPM_SVALUE
, if that value is present, or sets the 
q[]
 outputs to all 1s. If both 
sset
 and 
sclr
 are used and both are asserted, 
sclr
 is dominant. The 
sset
input affects the output 
q[]
 values before polarity is applied to the ports.
Synchronous load input. Loads the flipflop with the value on the 
data[]
 input 
on the next active clock edge. Default = 0. If 
sload
 is used, 
data[]
 must be 
used. For load operation, 
sload
 must be high (1) and 
enable
 must be high 
(1) or unconnected.
T flipflop: toggle enable; D flipflop: data input. This port is 
LPM_WIDTH
 wide. If 
the 
data[]
 port is not used, at least one of the 
aset
, 
aclr
, 
sset
, or 
sclr
ports must be used.
Positive-edge-triggered clock.
Clock enable input. Default = 1.
Synchronous clear input. If both 
sset
 and 
sclr
 are used and both are 
asserted, 
sclr
 is dominant. The 
sclr
 input affects the output 
q[]
 values 
before polarity is applied to the ports.
Asynchronous set input. Sets 
q[]
 outputs to the value specified by 
LPM_AVALUE
, if that value is present, or sets the 
q[]
 outputs to all 1s.
Asynchronous clear input. If both 
aset
 and 
aclr
 are used and both are 
asserted, 
aclr
 is dominant. The 
aclr
 input affects the output 
q[]
 values 
before polarity is applied to the ports.
Data output from D flipflops. This port is 
LPM_WIDTH
 wide.
sset
Input
No
sload
Input
No
data[]
Input
No
clock
Input
Input
Input
Yes
No
No
enable
sclr
aset
Input
No
aclr
Input
No
q[]
Output
Yes
aload
sset
sload
data[]
clock
enable
sclr
LPM_FF
LPM_AVALUE=
LPM_FFTYPE=
LPM_SVALUE=
LPM_WIDTH=
q[]
aclr
aset