參數(shù)資料
型號： BU-64743G8-200
廠商： DATA DEVICE CORP
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80
封裝： 22.35 X 22.35 MM, 3.30 MM HEIGHT, CERAMIC, QFP-80
文件頁數(shù)： 44/93頁
文件大?。?/td> 585K
代理商： BU-64743G8-200
49
Data Device Corporation
www.ddc-web.com
BU-6474X/6484X/6486X
J-07/05-0
FLAT PACK AND GULL WING PACKAGES - SIGNAL DESCRIPTIONS BY FUNCTIONAL GROUPS
+ 3.3V_Xcvr
-
+ 3.3V_Logic
10, 30, 51, 69
Gnd_Xcvr
-
Gnd_Logic
22, 79, 31, 50, 70
TABLE 48. POWER AND GROUND
SIGNAL NAME
BU-64743F/G0
BU-64843F/G0
BU-64863F/G0
PIN
-
22, 79
31, 50, 70
BU-64745F/G3/4
BU-64845F/G3/4
PIN
BU-64743F/G3/4
BU-64843F/G3/4
BU-64863F/G3/4
PIN
+ 3.3 Volt Transceiver Power
+ 5.0V_Xcvr
-
30, 51, 69
22, 79
31, 50, 70
10
+ 5.0 Volt Transceiver Power
+3.3 Volt Logic Power
+ 5.0V_Logic
-
30, 51, 69
10
30, 51, 69
22, 79
31, 50, 70
BU-64743F/G8/9
BU-64843F/G8/9
BU-64863F/G8/9
PIN
-
+5.0 Volt Logic Power
Transceiver Ground
Logic Ground
DESCRIPTION
TXDATA_A (O)
3
TXDATA_A (O)
5
RXDATA_A (I)
8
RXDATA_A
(I, not enabled)*
4
TABLE 50. INTERFACE TO EXTERNAL TRANSCEIVER (BU-64XX3F/G0 TRANSCEIVERLESS VERSION)
SIGNAL NAME
BU-64743F/G0
BU-64843F/G0
BU-64863F/G0
PIN
Digital Manchester biphase transmit outputs, A bus
Digital Manchester biphase receive inputs, A bus
TXINH_A_OUT (O)
11
TXDATA_B (O)
15
TXDATA_B (O)
17
RXDATA_B (I)
21
Digital output to inhibit external transmitter, A bus
Digital Manchester biphase transmit outputs, B bus
Digital Manchester biphase receive inputs, B bus
RXDATA_B
(I, not enabled)*
16
TXINH_B_OUT (O)
9
Digital output to inhibit external transmitter, B bus
UPADDREN / NC
14
4K versions: UPADDREN / 64K versions: NC
For 4K RAM versions, this signal is always configured as UPADDREN.
This signal is used to control the function of the upper 4 address inputs (A15-A12). For these versions of
Mark3 if UPADDREN is connected to logic "1", then these four signals operate as address lines A15-A12.
If UPADDREN is connected to logic "0", then A15 and A14 function as CLK_SEL_1 and CLK_SEL_0
respectively; A13 MUST be connected to +3.3V-LOGIC; and A12 functions as RTBOOT.
DESCRIPTION
TX/RX-A (I/O)
3
Analog Transmit/Receive Input/Outputs. Connect directly to 1553 isolation transformers.
TX/RX-A (I/O)
5
TX/RX-B (I/O)
15
TX/RX-B (I/O)
17
TABLE 49. 1553 ISOLATION TRANSFORMER (BU-64XXXF/G3/4/8/9 VERSIONS)
SIGNAL NAME
DESCRIPTION
BU-6474XF/G3/4/8/9
BU-6484XF/G3/4/8/9
BU-64863F/G3/4/8/9
PIN
*NOTE: Standard transceiverless parts have their receiver inputs internally strapped for single-ended operation. The RXDATAx pins are
connected to inputs that are not enabled. Contact the factory for a non-standard part that enables differential receive inputs.
NOTE: Logic ground and transceiver ground are not tied together inside the package.
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