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參數(shù)資料
| 型號(hào)： | BT261KPJ |
| 元件分類： | TVS-瞬態(tài)抑制二極管 |
| 英文描述： | Transient Voltage Suppressor Diodes |
| 中文描述： | 視頻信號(hào)發(fā)生器 |
| 文件頁數(shù)： | 29/56頁 |
| 文件大?。?/td> | 387K |
| 代理商： | BT261KPJ |
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Brooktree
23
L261_H
I
NTERNAL
R
EGISTERS
Command Register_2
Bt261
30 MHz Pixel Clock Monolithic CMOS HSYNC Line Lock Controller
Command Register_2
This command register may be written to or read by the MPU at any time and is not initialized. CR20 corresponds to D0
and is the least significant bit.
CR27, CR24
Phase lock pixel count
(0001) 2 clock cycles
(1111) 16 clock cycles
These bits specify the maximum number of pixel clock
cycles between the falling edge of noise-gated
CSYNC* and the HSYNC signal (either internally or
externally generated) to be considered locked.
If the number of pixel clock cycles between the falling
edge of noise-gated CSYNC* and the HSYNC signal
exceed this value, lock is considered to be lost for that
scan line, and the lock loss status bit (SR00) is set to
a logical zero.
CR23
Pixel clock mask enable
(0)
(1)
continuous pixel clock
stop pixel clock at HCOUNT
If this bit is a logical one, the CLOCK output is
stopped in the logical one state when the horizontal
counter reaches the HCOUNT value. This ensures a
minimum pulse width when the noise-gated CSYNC*
signal is asynchronously sampled. If it is a logical
zero, the CLOCK output will continuously clock (if
command bit CR16 is a logical zero). This bit is
ignored if an external pixel clock is driving the CLOCK
pin (command bit CR16 is a logical one).
CR22
Lock override
(1)
(0)
normal operation
tell phase comparator it's locked
If the Bt261 goes out of lock, the phase limiter is auto-
matically disabled until it is back in lock. If this bit is a
logical zero, this function is overridden.
CR21, CR20
Pixel clock select
(00)
(01)
(10)
(11)
OSC inputs
external pixel clock
OSC drives CLOCK direct
reserved
These bits specify whether to use the OSC-generated
pixel clock or an external pixel clock (driving the
CLOCK pin) to clock internal counters.
In mode (00), the selected OSC input(s) is divided
down by the OSC count registers to generate the
pixel clock (CLOCK).
If mode (01) is selected, an external pixel clock must
drive the CLOCK pin and one of the OSC inputs.
Command bit CR16 must be a logical one.
If mode (10) is selected, the OSC clock is output
directly onto the CLOCK pin. The OSC count low and
high registers are ignored.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BT26P | 制造商:Banner Engineering 功能描述:FIBER BT26P |
| BT26S | 制造商:Banner Engineering 功能描述:Sensor, Fiber Optic, Assembly, Bifurcated 制造商:Banner Engineering 功能描述:FIBER OPTIC SENSOR 制造商:Banner Engineering 功能描述:FIBER OPTIC SENSOR; Fiber Optic Sensor Type:Bifurcated Fibre; Type:Bifurcated Fibre ;RoHS Compliant: Yes |
| BT26SM900 | 制造商:Banner Engineering 功能描述:Sensor, Glass Fiber 制造商:Banner Engineering 功能描述:FIBER BT26SM900 ;ROHS COMPLIANT: YES |
| BT26SMSS | 制造商:Banner Engineering 功能描述:Sensor, Glass Fiber |
| BT-27 | 功能描述:TERM BLOCK HIGH CURRENT 27CIRC RoHS:是 類別:連接器，互連式 >> 接線座 - 隔板塊 系列:BT 標(biāo)準(zhǔn)包裝:10 系列:Beau™ 38780 端接塊類型:阻隔塊 電路數(shù):15 導(dǎo)線入口數(shù)目:30 間距:0.438"（11.12mm） 行數(shù):2 電流:15A 電壓:300V 線規(guī):14-22 AWG 頂部端子:螺釘 底部端子:焊片 阻擋層類型:雙壁（雙） 特點(diǎn):法蘭 顏色:黑 包裝:散裝 安裝類型:通孔 工作溫度:- 材料 - 絕緣體:聚對苯二甲酸丁二酯（PBT），玻璃纖維增強(qiáng)型 材料可燃性額定值:UL94 V-0 其它名稱:038780-111538780-1115387801115 |
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