參數(shù)資料
型號: ATAM893T-TKQ
廠商: Atmel
文件頁數(shù): 75/98頁
文件大?。?/td> 0K
描述: IC MON TIRE-PRESS ATARX9X SER
標(biāo)準(zhǔn)包裝: 4,000
系列: MARC4
核心處理器: MARC4
芯體尺寸: 4-位
速度: 4MHz
連通性: SSI(2 線,3 線)
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: EEPROM
EEPROM 大小: 64 x 16
RAM 容量: 256 x 4
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 6.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
77
4680C–4BMCU–01/05
ATAM893-D
Combination Mode 6: FSK Modulation
SSI mode 1:
8-bit shift register internal data output (SO) to the Timer 3
Timer 3 mode 8:
FSK modulation with shift register data (SO)
The two compare registers are used to generate two varied time intervals. The SSI data output
selects which compare register is used for the output frequency generation. A '0'-level at the SSI
data output enables the compare register 1 and a '1'-level enables the compare register 2. The
compare and compare mode registers must be programmed to generate the two frequencies via
the output toggle flip-lop. The SSI can be supplied with the toggle signal of Timer 2 or any other
clock source. The Timer 3 counter is driven by an internal or external clock source.
Figure 5-55. FSK Modulation 1
Combination Mode 7: Pulse-width Modulation (PWM)
SSI mode 1:
8-bit shift register internal data output (SO) to the Timer 3
Timer 3 mode 9:
Pulse-width modulation with the shift register data (SO)
The two compare registers are used to generate two varied time intervals. The SSI data output
selects which compare register is used for the output pulse generation. In this mode, both com-
pare and compare mode registers must be programmed to generate the two pulse width. It is
also useful to enable the single-action mode for extreme duty cycles. Timer 2 is used as baud-
rate generator and for the triggered restart of Timer 3. The SSI must be supplied with the toggle
signal of Timer 2. The counter is driven by an internal or external clock source.
Figure 5-56. Pulse-width Modulation
01 23 401 2 340 1 2 3
Counter 3
CM31
CM32
SO
4 0 1 2 012 012 0 1 20 1 2 01 201 20 1 2 3
T3R
40
T3O
1
01
0
000 00 00 00
0 0 0 0
Counter 3
CM31
CM32
T3O
00 0 0 0 1 234 5 6 7 8 9101112131415 0 1234 5
TOG2
67 8
1
9
1112
10
14
13
0
2 3
14
15
0
1
SIR
SO
SCO
T3R
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