參數(shù)資料
型號(hào)： ATAM893T-TKQ
廠商： Atmel
文件頁(yè)數(shù)： 63/98頁(yè)
文件大?。?/td> 0K
描述： IC MON TIRE-PRESS ATARX9X SER
標(biāo)準(zhǔn)包裝： 4,000
系列： MARC4
核心處理器： MARC4
芯體尺寸： 4-位
速度： 4MHz
連通性： SSI（2 線，3 線）
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 16
程序存儲(chǔ)器容量： 4KB（4K x 8）
程序存儲(chǔ)器類型： EEPROM
EEPROM 大?。?/td> 64 x 16
RAM 容量： 256 x 4
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 6.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 20-SOIC（0.209"，5.30mm 寬）
包裝： 帶卷 (TR)
66
4680C–4BMCU–01/05
ATAM893-D
Figure 5-43. Example of MCL Receive Dialog
5.3.4.6
8-bit Pseudo MCL Mode
In this mode, the SSI exhibits all the typical MCL operational features except for the acknowl-
edge-bit which is never expected or transmitted.
5.3.4.7
MCL Bus Protocol
The MCL protocol constitutes a simple 2-wire bi-directional communication highway via which
devices can communicate control and data information. Although the MCL protocol can support
multi-master bus configurations, the SSI in MCL mode is intended for use purely as a master
controller on a single master bus system. So all reference to multiple bus control and bus con-
tention will be omitted at this point.
All data is packaged into 8-bit telegrams plus a trailing handshaking or acknowledge-bit. Nor-
mally the communication channel is opened with a so-called start condition, which initializes all
devices connected to the bus. This is then followed by a data telegram, transmitted by the mas-
ter controller device. This telegram usually contains an 8-bit address code to activate a single
slave device connected onto the MCL bus. Each slave receives this address and compares it
with its own unique address. The addressed slave device, if ready to receive data, will respond
by pulling the SD line low during the 9th clock pulse. This represents a so-called MCL acknowl-
edge. The controller detecting this affirmative acknowledge then opens a connection to the
required slave. Data can then be passed back and forth by the master controller, each 8-bit tele-
gram being acknowledged by the respective recipient. The communication is finally closed by
the master device and the slave device put back into standby by applying a stop condition onto
the bus.
76 54 3 2 1
7 65 4 3 2 1 0 A
msb
lsb
tx data 1
rx data 2
msb
lsb
Write STB
(tx data 1)
SC
SD
SRDY
ACT
Interrupt
(IFN = 0)
Interrupt
(IFN = 1)
0A
Read SRB
(rx data 2)
SIR
SDD
Start
Stop
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ATAM893T-TKQYD 功能描述:4位微控制器 - MCU Marc4 micrium 4 k FLASH RoHS:否 最大時(shí)鐘頻率:32 KHz/4 MHz 程序存儲(chǔ)器大小:4 KB 封裝 / 箱體:SSO-20 制造商:Atmel 核心:MARC4 數(shù)據(jù)總線寬度:4 bit 安裝風(fēng)格:SMD/SMT
ATAM893T-TKS 功能描述:IC MON TIRE-PRESS ATARX9X SER RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MARC4 標(biāo)準(zhǔn)包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲(chǔ)器容量:8KB（4K x 16） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR)
ATAM893T-TKSYD 功能描述:4位微控制器 - MCU Marc4 micrium 4k FLASH RoHS:否 最大時(shí)鐘頻率:32 KHz/4 MHz 程序存儲(chǔ)器大小:4 KB 封裝 / 箱體:SSO-20 制造商:Atmel 核心:MARC4 數(shù)據(jù)總線寬度:4 bit 安裝風(fēng)格:SMD/SMT
ATAM893X-TKHYZ 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Flash Version for ATAR080, ATAR090/890 and ATAR092/892
ATAM893X-TKQYZ 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Flash Version for ATAR080, ATAR090/890 and ATAR092/892
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