參數(shù)資料
型號: AMIS-30621-AGA
元件分類: 運動控制電子
英文描述: STEPPER MOTOR CONTROLLER, 0.8 A, PDSO20
封裝: 300 INCH, PLASTIC, SOIC-20
文件頁數(shù): 31/57頁
文件大?。?/td> 1017K
代理商: AMIS-30621-AGA
AMIS-30621 LIN Micro-stepping Motor Driver
Data Sheet
37
AMI Semiconductor
– Sept. 2007, Rev 1.5
www.amis.com
Figure 24: 7-bit LIN Address
However the maximum number of nodes in a LIN network is also limited by the physical properties of the bus line. It is recommended to
limit the number of nodes in a LIN network to not exceed 16. Otherwise the reduced network impedance may prohibit a fault free
communication under worst case conditions. Every additional node lowers the network impedance by approximately three percent.
All LIN commands are using 7-bit addressing except SetPositionShort where only the four least significant address bits are used.
These bits are shaded in Figure 24.
The physical address AD[6:0] is a combination of four OTP memory bits PA[3:0] from the OTP Memory Structure and three hardwired
address bits HW[2:0]. Depending on the addressing diode (ADM –bit in OTP Memory Structure) the combination is as illustrated in
Figure 25: Combination of OTP and Hardwired Address Bits in Function of ADM
Note:
Pins HW0 and HW1 are 5V digital inputs, whereas pin HW2 is compliant with a 12V level, e.g. it can be connected to Vbat or Gnd via a terminal of the PCB. To provide
cleaning current for this terminal, the system used for pin SWI is also implemented for pin HW2 (see Hardwired Address HW2).
15.6 LIN Frames
The LIN frames can be divided in writing and reading frames. A frame is composed of an 8-bit Identifier followed by 2, 4 or 8 data-bytes.
Writing frames will be used to:
Program the OTP memory
Configure the component with the stepper-motor parameters (current, speed, stepping-mode, etc.)
Provide set-point position for the stepper motor
Whereas reading frames will be used to:
Get the actual position of the stepper motor
Get status information such as error flags
Verify the right programming and configuration of the component
MSB
LSB
AD[6:0] LIN SLAVE ADDRESS
PC20070304.1
PA0
PA3 PA2 PA1
HW1
MSB
LSB
OTP memory
HW0
HW2
Hardwired
<ADM> = 1
OTP memory
PA3 PA2 PA1 PA0
HW1
MSB
LSB
OTP memory
PC20070304.2
HW0
HW2
Hardwired
<ADM> = 0
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