參數(shù)資料
型號: AMIS-30621-AGA
元件分類: 運動控制電子
英文描述: STEPPER MOTOR CONTROLLER, 0.8 A, PDSO20
封裝: 300 INCH, PLASTIC, SOIC-20
文件頁數(shù): 30/57頁
文件大?。?/td> 1017K
代理商: AMIS-30621-AGA
AMIS-30621 LIN Micro-stepping Motor Driver
Data Sheet
36
AMI Semiconductor
– Sept. 2007, Rev 1.5
www.amis.com
15.2 Slave Operational Range for Proper Self Synchronization
The LIN interface will synchronize properly in the following conditions:
Vbb ≥ 7.3V
Ground shift between master node and slave node < ±10% Vbb
It is highly recommended to use the same type of reverse battery voltage protection diode for the master and the slave nodes.
15.3 Functional Description
15.3.1. Analog Part
The transmitter is a low-side driver with a pull-up resistor and slope control. Figure 5 shows the characteristics of the transmitted signal,
including the delay between internal TxD – and LIN signal. See AC Parameters for timing values.
The receiver mainly consists of a comparator with a threshold equal to Vbb/2. Figure 5 also shows the delay between the received
signal and the internal RXD signal. See also AC Parameters for timing values.
15.3.2. Protocol Handler
This block implements:
Bit synchronization
Bit timing
The MAC layer
The LLC layer
The supervisor
15.3.3. Electromagnetic Compatibility (EMC)
EMC behavior fulfills requirements defined by LIN specification, rev. 1.3.
15.4 Error Status Register
The LIN interface implements a register containing an error status of the LIN communication. This register is as follows:
Table 22: LIN Error Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Not used
Time
out error
Data
error Flag
Header
error Flag
Bit
error Flag
With:
Time out error:
The message frame is not fully completed within the maximum length TFRAME_MAX
Data error flag:
Checksum error
⊕ StopBit error ⊕ Length error
Header error flag:
Parity
⊕ SynchField error
Bit error flag:
Difference in bit send and bit monitored on the LIN bus
A GetFullStatus frame will reset the error status register.
15.5 Physical Address of the Circuit
The circuit must be provided with a physical address in order to discriminate it from other ones on the LIN bus. This address is coded
on 7 bits, yielding the theoretical possibility of 128 different circuits on the same bus.
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