參數(shù)資料
型號(hào)： AM79C983AKC
廠商： ADVANCED MICRO DEVICES INC
元件分類(lèi)： 網(wǎng)絡(luò)接口
英文描述： Integrated Multiport Repeater 2 (IMR2⑩)
中文描述： DATACOM, ETHERNET TRANSCEIVER, PQFP132
封裝： PLASTIC, QFP-132
文件頁(yè)數(shù)： 34/60頁(yè)
文件大?。?/td> 348K
代理商： AM79C983AKC
34
Am79C983A
P R E L I M I N A R Y
Pn/AUI/RAUI/EP
0
1
No match
Source address matches the
Source Address Match Register
Note: This function is useful for mapping stations to
ports in a network.
Data Rate Mismatch Interrupt
Address:
1110 1010
A bit is set when the data received by the corresponding
port has caused an overflow or underflow of the FIFO.
This bit is not set unless the received packet, after SFD, is
at least 512 bits long and collision did not occur
Pn/AUI/RAUI/EP
0
1
No error
Data rate error
Transceiver Interface Status
Address:
1110 1111
If a QuIET transceiver is not hardware connected, the
corresponding bit on the register is set.
QuIET 0 (Q0)
QuIET 1 (Q1)
QuIET 2 (Q2)
QuIET 3 (Q3)
PAUI [3:0]
PAUI [7:4]
PAUI [11:8]
AUI and RAUI ports
Qn
0 QuIET device is connected
1 Non-QuIET transceiver is connected
Transceiver Interface Change Interrupt
Address:
1111 0000
If the device changes from a QuIET device to another type
of transceiver or from a non-QuIET device to a QuIET
device, the corresponding bit on the register is set.
QuIET 0 (Q0)PAUI [3:0]
QuIET 1 (Q1)
QuIET 2 (Q2)
QuIET 3 (Q3)
PAUI [7:4]
PAUI [11:8]
AUI and RAUI ports
Qn
0
1
No change of transceiver type
Change of transceiver type
Jabber Interrupt
Address:
A bit on this register is set if the transceiver connected
to the corresponding port detects jabber.
1111 0001
TPn/SPn
0
1
Port does not jabber
Port in jabber
Register Bank 2: Interrupt Control Registers
These registers are accessed by writing the bit pattern
0000 0010 to the C Register. All registers can be read
from as well as written to. A set (1) control bit enables
an interrupt or function of the corresponding port. All
control registers are cleared upon reset. Also, all inter-
rupts are disabled and all status bits are cleared upon
hardware reset.
Partition Status Change Interrupt Enable
Address:
1110 0000
This register is used to enable or mask interrupts
caused by a change in the Port Partitioning Status.
Note that if this is the only cause for the interrupt, dis-
abling an active interrupt source causes the INT output
to be placed into an inactive state. Software should be
designed to write zeros into unused bits.
Pn/AUI/RAUI
0
Partition Status Change Interrupt
masked (disabled)
Partition
Status
Interrupt enabled
1
Change
Runts with Good FCS Interrupt Enable
Address:
1110 0001
This register is used to enable or mask interrupts
caused by a port receiving a packet that is less than 64
octets (not including preamble and SFD), but is other-
wise well formed and error free.
P7
0
P6
EP
P5
RAUI
AUI
P4
P3
P11 P10 P9
P2
P1
P0
P8
LSB
D Port Read
Byte 0
Byte 1
MSB
X
X
X
Q3
Q2
Q1
Q0
LSB
D Port Read
X
MSB
X
X
X
Q3
Q2
Q1
Q0
LSB
D Port Read
X
MSB
TP7 TP6 TP5 TP4 TP3 TP2 TP1 TP0
SP3 SP2 SP1 SP0
TP11 TP
10
TP9 TP8
Byte 0
Byte 1
D Port Read
MSB
LSB
P7
0
P6
0
P5
RAUI
AUI
P4
P3
P11 P10 P9
P2
P1
P0
P8
LSB
D Port Read/Write
Byte 0
Byte 1
MSB
P7
0
P6
EP
P5
RAUI
AUI
P4
P3
P11 P10 P9
P2
P1
P0
P8
LSB
D Port Read/Write
Byte 0
Byte 1
MSB
相關(guān)PDF資料
PDF描述
AM79C984 enhanced Integrated Multiport Repeater (eIMR⑩)
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AM79C984AKCW Circular Connector; No. of Contacts:6; Series:MS27474; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:8; Circular Contact Gender:Pin; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:8-35 RoHS Compliant: No
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C983AKCW 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:Integrated Multiport Repeater 2 (IMR2⑩)
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AM79C984 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:enhanced Integrated Multiport Repeater (eIMR⑩)
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