
166
Am79C976
8/01/00
P R E L I M I N A R Y
ROM_CFG: ROM Base Address Configuration
Register
Offset 18Eh
This register, which should normally be loaded from the
serial EEPROM, determines which bits in the Expan-
sion ROM Base Address Register (ROMBASE) in PCI
Configuration Space can be altered by PCI Configura-
tion Space write accesses. Therefore this register indi-
rectly determines the amount of PCI memory space
that the Am79C976 device will claim for the PCI Expan-
sion ROM.
The contents of this register are cleared to 0 when the
RST pin is asserted, before the serial EEPROM is
read, and after a serial EEPROM read error.
Table 74. ROM_CFG: ROM Base Address Configuration Register
*@05$!*
Offset 1B4h
This register is a writable alias of the Subsystem ID
field at offset 2Eh in PCI configuration space, which is
read only. The purpose of this register is to allow the
PCI Subsystem Vendor ID value to be loaded from the
serial EEPROM.
The contents of this register are cleared to 0 when the
RST pin is asserted, before the serial EEPROM is
read, and after a serial EEPROM read error.
Table 75. SID_A: PCI Subsystem ID Alias Register
Bit
Name
Description
15-3
ROMBASE
[23:11]
This field contains write enable bits for bits [23:11] of the Expansion ROM Base Address Register
(ROMBASE) in PCI Configuration Space. If a bit in this field is set to 1, the corresponding bit in the
ROMBASE register can be written by PCI Configuration Space accesses. If a bit in this field is
cleared to 0, the corresponding bit in the ROMBASE register will be fixed at 0, and can not be
altered by PCI Configuration Space accesses.
Bits 15-3 of this field correspond to bits 23-11 of the ROMBASE register.
2-1
RES
Reserved locations. Written as zeros; read as undefined.
0
ROMBASE[0]
This bit is the write enable bit for bit [0] of the Expansion ROM Base Address Register (ROMBASE)
in PCI Configuration Space. If this bit is set to 1, the Expansion ROM Enable bit in the ROMBASE
register can be written by PCI Configuration Space accesses. If a bit in this field is cleared to 0,
the Expansion ROM Enable bit in the ROMBASE register will be fixed at 0, and can not be altered
by PCI Configuration Space accesses.
This bit should be set to 1, normally by the EEPROM read operation, if an expansion ROM is
present in the system. It should be cleared to 0 (the default state) if there is no expansion ROM in
the system.
Bit
Name
Description
15-0
SID
Subsystem ID. SID is used together with SVID (BCR23, bits 15-0) to uniquely identify the add-in
board or subsystem the Am79C976 controller is used in. The value of SID is determined by the
system vendor. A value of 0 (the default) indicates that the Am79C976 controller does not support
subsystem identification.
This register is an alias of BCR24 and of the PCI configuration space Subsystem ID field at offset
2Eh.