參數(shù)資料
型號(hào)： AM79C976KIW
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller
中文描述： 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208
封裝： PLASTIC, QFP-208
文件頁(yè)數(shù)： 116/309頁(yè)
文件大?。?/td> 2070K
代理商： AM79C976KIW
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116
Am79C976
8/01/00
P R E L I M I N A R Y
ler requires. When the host writes
a value of FFFF FFFFh to the I/O
Base Address register, it will read
back a value of 0 in bits 4-2. That
indicates an Am79C976 I/O
space requirement of 32 bytes.
1
RES
Reserved location. Read as zero;
write operations have no effect.
0
IOSPACE
I/O space indicator. Read as one;
write operations have no effect.
Indicating that this base address
register describes an I/O base
address.
0#!$#''
Offset 14h
The PCI Memory Mapped I/O Base Address register is
a 32-bit register that determines the location of the
Am79C976 I/O resources. Memory space claimed by
the Am79C976 device may be mapped anywhere in 32-
bit memory space.
Bit
Name
Description
31-12
MEMBASE Memory mapped I/O base ad-
dress, bits 31-12. These bits are
written by the host to specify the
location of the Am79C976 I/O re-
sources in 32-bit memory space.
MEMBASE must be written with a
valid
address
Am79C976
memory mapped I/O mode is
turned on by setting the MEMEN
bit (PCI Command register, bit 1).
before
the
controller
slave
When the Am79C976 controller
is enabled for memory mapped
I/O mode (MEMEN is set), it mon-
itors the PCI bus for a valid mem-
ory command. If the value on
AD[31:12] during the address
phase of the cycles matches the
value
of
MEMBASE,
Am79C976 controller will drive
DEVSEL indicating it will respond
to the access.
the
MEMBASE is read and written by
the host. MEMBASE is cleared
by H_RESET and is not affected
by S_RESET or by setting the
STOP bit.
11-4
MEMSIZE
Memory mapped I/O size re-
quirements. Read as zeros; write
operations have no effect.
MEMSIZE indicates the size of
the
memory
Am79C976 controller requires.
When the host writes a value of
FFFF FFFFh to the Memory
Mapped I/O Base Address regis-
ter, it will read back 0s in bit 11:4
to indicate an Am79C976 memo-
ry space requirement of 4K bytes.
space
the
3
PREFETCH Prefetchable. The value of this
read-only bit is the inverse of the
value of the Disable Prefetchabil-
ity (PREFETCH_DIS) bit (CMD3,
bit 30). PREFETCH_DIS is nor-
mally loaded from EEPROM. Set-
ting PREFETCH to 1 indicates
that the memory space claimed
by this device can be prefetched.
Because of the side effects of
reading the Reset Register at off-
set 14h or 18h (depending on the
state of DWIO (CMD2, bit 28)),
locations at offsets less than 20h
cannot
be
prefetched.
Am79C976 device will discon-
nect any attempted burst transfer
at offsets less than 20h.
The
This bit is read-only. (However,
its value is the inverse of
PREFETCH_DIS, which can be
loaded from EEPROM.)
2-1
TYPE
Memory type indicator. Read as
zeros; write operations have no
effect. Indicates that this base ad-
dress register is 32 bits wide and
mapping can be done anywhere
in the 32-bit memory space.
0
MEMSPACEMemory space indicator. Read
as zero; write operations have no
effect. Indicates that this base ad-
dress register describes a memo-
ry base address.
05$!=*
Offset 2Ch
The PCI Subsystem Vendor ID register is a 16-bit reg-
ister that together with the PCI Subsystem ID uniquely
identifies the add-in card or subsystem the Am79C976
controller is used in. Subsystem Vendor IDs can be ob-
tained from the PCI SIG. A value of 0 (the default) indi-
cates that the Am79C976 controller does not support
subsystem identification. The PCI Subsystem Vendor
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