參數(shù)資料
型號(hào)： AM79C32AVC
廠商： ADVANCED MICRO DEVICES INC
元件分類： 數(shù)字傳輸電路
英文描述： Digital Subscriber Controller⑩ (DSC⑩) Circuit
中文描述： DATACOM, DIGITAL SLIC, PQFP44
封裝： PLASTIC, TQFP-44
文件頁數(shù)： 57/101頁
文件大?。?/td> 1607K
代理商： AM79C32AVC
Am79C30A/32A Data Sheet
57
IOM-2 Activation/Deactivation
The IOM-2 Interface includes an activation/deactivation
capability (see Figure 13). Activation and deactivation
can be initiated from either upstream or downstream
components on the bus. When deactivated, the up-
stream device holds all the clock outputs Low, and the
downstream devices force their open drain data out-
puts to a High-Z state (seen as a High on the system
bus due to the external pullup resistor). The activa-
tion/deactivation procedure is a combination of soft-
ware handshakes via the C/I channel, and hardware
indications via the clock and data lines. The IOM-2
specification describes both the hardware and software
protocols in detail; the hardware operation supported
by the Am79C30A IOM-2 implementation is outlined in
Figure 13.
DSC/IDC Circuit as Upstream Device (Clock Master)
Deactivation
Deactivation of the IOM-2 Interface from the
Am79C30A operating as an upstream device is initi-
ated and controlled by the microprocessor. A series of
software handshakes via the C/I channel must be per-
formed before the hardware deactivation can take
place. The upstream device must issue a deactivation
request command on the C/I channel and wait for a de-
activation indication from all downstream units. Once
this is received, a deactivation confirmation command
must be sent on the C/I channel by the upstream de-
vice. The upstream device will then stop all clocks and
hold them Low. On the Am79C30A, the IOM-2 clocks
(SCLK,SFS, and BCL/CH2STRB) are stopped and
forced Low when the microprocessor clears the activa-
tion/deactivation bit in the Peripheral Port Control
SBIN goes Low
Timing Request Interrupt generated
Idle
(clks off)
clk pend
(clks off)
ACTIVE
(clks on)
(clks off)
(SBIN = 0)
(clks on)
(SBIN = 0)
(clks off)
(SBIN = Z)
Idle
Timeout
(clks off)
Software clears
Activation bit
ACTIVE
(clks on)
(SBIN = data)
Software sets
Activation bit
Software sets
Activation bit
Software sets Activation bit
SBIN output forced Low
Clock received from
upstream; Timing Request
interrupt generated
Software sets Activation bit
Clocks stopped by upstream device
a. Am79C30A as Upstream Device
a. Am79C30A as Downstream Device
SBIN output forced to Z
Notes:
This diagram shows only the portions of the IOM-2 activation/deactivation procedures that are affected by the Am79C30A
hardware. The C/I-channel software handshakes are not shown.
Figure 13.
IOM-2 Activation/Deactivation
09893H-9
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