
Am79C30A/32A Data Sheet
49
3. Inter-chip communication between devices on the
bus, for instance, data flow between the DSC circuit
MAP and an external speech encryption device.
4. Connection of multiple DLCs to the D channel, in-
cluding access arbitration. This function is referred
to as the TIC channel.
The IOM-2 Terminal mode bus consists of three IOM-2
subframes, each containing 32 bits. This 12-byte frame
is repeated at 8 kHz, resulting in an aggregate data rate
of 768 kbits/s. The frame structure is illustrated in Fig-
ure 7, and contains the following channels:
Two 64-kbits/s data channels, labeled B1 and B2.
Two device programming channels, labeled Monitor
0 and 1. Each channel has an associated pair of MX
and MR handshake bits that control data flow.
One 16-kbits/s D channel for signaling and data
packets.
Two Command/Indicate channels, labeled C/I0, and
C/I1, to provide status and command for devices
connected via the monitor channels. The Com-
mand/Indicate channel in the first IOM-2 subframe
consists of four bits, providing 16 states in each di-
rection. In the second subframe the C/I channel is 6
bits, providing 64 states in each direction.
Two 64-kbits/s intercommunication channels, la-
beled IC1 and IC2, to provide additional interdevice
communications bandwidth.
All data transmitted on the IOM-2 Interface via the
SBOUT pin is transmitted MSB first, with the exception
of D-channel data, which is transmitted LSB first. The
receiver operates in a compatible way via the SBIN pin.
SCLK
192 kHz
SBIN or
SBOUT
SFS
41.7 μs
52 μs
LSB
MSB
125 μs
B3
Bd
Bf
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
Figure 5.
Serial Bus Port Mode Timing
09893H-6
Note:
SBIN is sampled on the rising edge of SCLK. SBOUT is changed on the falling edge of SCLK.
SFS
SBIN/
MR,MX
IOM channel 0
Figure 6.
IOM-2 Terminal Mode Frame Structure
09893H-7
MR,MX
IOM channel 2
IOM channel 1
SBOUT
B1
B2
MON0 D C/I
IC1
IC2
MON1
C/I
TIC