參數(shù)資料
型號: AK5702VN
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 4-Channel ADC with PLL & MIC-AMP
中文描述: 4通道ADC,帶鎖相環(huán)
文件頁數(shù): 44/76頁
文件大?。?/td> 933K
代理商: AK5702VN
[AK5702]
MS0623-E-00
2007/06
- 44 -
3.
Example of ALC Operation
Table 35 shows the examples of the ALC setting for mic recording.
fs=8kHz
Operation
4.1dBFS
Enable
16ms
fs=44.1kHz
Operation
4.1dBFS
Enable
23.2ms
Register Name
Comment
Data
01
0
00
Data
01
0
11
LMTHA/B1-0
ZELMNA/B
ZTMA/B1-0
Limiter detection Level
Limiter zero crossing detection
Zero crossing timeout period
Recovery waiting period
*WTMA/B 2-0 bits should be the same
data as ZTMA/B 1-0 bits
Maximum gain at recovery operation
WTMA/B2-0
000
16ms
011
23.2ms
REFA/B7-0
IVA/BL7-0,
IVA/BR7-0
LMATA/B1-0
LFST
RGA/B1-0
RFSTA/B1_0
ALCA/B
E1H
+30dB
E1H
+30dB
Gain of IVOL
91H
0dB
91H
0dB
Limiter ATT step
Fast Limiter Operation
Recovery GAIN step
Fast Recovery Speed
ALC enable
00
1
00
00
1
1 step
ON
1 step
4 times
Enable
00
1
00
00
1
1 step
ON
1 step
4 times
Enable
Table 35. Example of the ALC setting
The following registers should not be changed during the ALC operation. These bits should be changed after the ALC
operation is finished by ALC4 bit = ALCA/B bit = “0” or PMADA/BL=PMADA/BR bits = “0”.
LMTHA/B1-0, LMATA/B1-0, WTMA/B2-0, ZTMA/B1-0, RGA/B1-0, REFA/B7-0, ZELMNA/B, LFST,
RFSTA/B1-0
Manual Mode
* The value of IVOL should be
the same or smaller than REF’s
WR (ZTMA1-0, WTMA2-0, RFSTA1-0)
WR (REFA7-0)
WR (IVAL/R7-0)
WR (LMATA1-0, RGA1-0, ZELMNA, LMTHA1-0; ALCA= “1”)
Example:
Limiter = Zero crossing Enable
Recovery Cycle = 16ms@8kHz
Limiter and Recovery Step = 1
Maximum Gain = +30.0dB
Limiter Detection Level =
4.1dBFS
Fast Limiter Operation :ON
ALCA bit = “1”
(1) Addr=08H&09H, Data=91H
(2) Addr=0AH, Data=00H
(3) Addr=0BH, Data=E1H
ALC Operation
Note : WR : Write
(4) Addr=0DH, Data=02H
WR (LFST)
(5) Addr=0CH, Data=81H
Figure 43. Registers set-up sequence at ALCA operation
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