參數(shù)資料
型號： AK5702VN
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： 4-Channel ADC with PLL & MIC-AMP
中文描述： 4通道ADC，帶鎖相環(huán)
文件頁數(shù)： 23/76頁
文件大?。?/td> 933K
代理商： AK5702VN
[AK5702]
MS0623-E-00
2007/06
- 23 -
■
PLL Mode
When PMPLL bit is “1”, a fully integrated analog phase locked loop (PLL) generates a clock that is selected by the
PLL3-0 and FS3-0 bits. The PLL lock time is shown in Table 4, whenever the AK5702 is supplied to a stable clocks after
PLL is powered-up (PMPLL bit = “0”
→
“1”) or sampling frequency changes.
1) Setting of PLL Mode
PLL
Reference
Clock Input
Pin
0
0
0
0
0
LRCK pin
2
0
0
1
0
BCLK pin
3
0
0
1
1
BCLK pin
4
0
1
0
0
MCKI pin
5
0
1
0
1
MCKI pin
6
0
1
1
0
MCKI pin
7
0
1
1
1
MCKI pin
8
1
0
0
0
MCKI pin
9
1
0
0
1
MCKI pin
12MHz (Note 29)
12
1
1
0
0
MCKI pin
13
1
1
0
1
MCKI pin
14
1
1
1
0
MCKI pin
15
1
1
1
1
MCKI pin
Others
Others
N/A
Note 29. See Table 5 regarding the difference between PLL3-0 bits = “0110”(Mode 6) and “1001”(Mode 9).
Clock jitter is lower in Mode9 than Mode6 respectively.
Table 4. Setting of PLL Mode (fs: Sampling Frequency)
2) Setting of sampling frequency in PLL Mode
When PLL reference clock input is MCKI pin, the sampling frequency is selected by FS3-0 bits as defined in Table 5.
Mode
FS3 bit
FS2 bit
FS1 bit
0
0
0
0
1
0
0
0
2
0
0
1
3
0
0
1
R and C of
VCOC pin
R[
Ω
]
Mode
PLL3
bit
PLL2
Bit
PLL1
bit
PLL0
bit
Input Frequency
C[F]
PLL Lock
Time
(max)
1fs
32fs
64fs
6.8k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
220n
4.7n
10n
4.7n
10n
4.7n
4.7n
4.7n
4.7n
4.7n
4.7n
10n
10n
220n
220n
80ms
2ms
4ms
2ms
4ms
40ms
40ms
40ms
40ms
40ms
40ms
40ms
40ms
60ms
60ms
11.2896MHz
12.288MHz
12MHz
24MHz
19.2MHz
(default)
13.5MHz
27MHz
13MHz
26MHz
FS0 bit
0
1
0
1
Sampling Frequency
8kHz
12kHz
16kHz
24kHz
7.35kHz
7.349918kHz (Note 30)
11.025kHz
11.024877kHz (Note 30)
14.7kHz
14.69984kHz (Note 30)
22.05kHz
22.04975kHz (Note 30)
32kHz
48kHz
29.4kHz
29.39967kHz (Note 30)
44.1kHz
44.0995kHz (Note 30)
N/A
4
0
1
0
0
5
0
1
0
1
6
0
1
1
0
7
0
1
1
1
10
11
1
1
0
0
1
1
0
1
14
1
1
1
0
15
1
1
1
1
(default)
Others
Others
Note 30. In case of PLL3-0 bits = “1001”
Table 5. Setting of Sampling Frequency at PMPLL bit = “1” and Reference Clock=MCKI pin
相關(guān)PDF資料
PDF描述
AK6002A Circular Connector; No. of Contacts:8; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:16-8 RoHS Compliant: No
AK6002AF Circular Connector; No. of Contacts:23; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:16-99 RoHS Compliant: No
AK6002AV The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
AK6004A Circular Connector; No. of Contacts:26; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:16; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:16-26 RoHS Compliant: No
AK6004AF The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
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