參數(shù)資料
型號(hào): AK4650VG
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類(lèi): Codec
英文描述: 16Bit ツヒ CODEC with MIC/HP/SPK-AMP & TSC
中文描述: 16位ツヒ編解碼器麥克風(fēng)/惠普/胰腎聯(lián)合移植腺苷
文件頁(yè)數(shù): 55/86頁(yè)
文件大?。?/td> 824K
代理商: AK4650VG
[AK4650]
MS0502-E-01
2007/04
- 55 -
3. Register Read
The AK4650 supports the following three measurement methods which are selected by ADMODE1-0 bits.
(1)
74H Register Read
(2)
XY Measurement Mode
(3)
XYZ Measurement Mode
ADMODE 1-0 bits
00
74H Register Read
01
XY measurement mode
10
XYZ measurement mode
11
Reserved
Table 49. 12bit ADC measurement mode setting
3-1. 74H Register Read Method
The AK4650 reports the measurement result set by A2-0
and
SER bits to the control register address 74H. The controller
gets the measurement result by reading the control register address 74H. 74H register is cleared by PM12AD bit = “0”.
74H consists of the followings:
D15(ADE) : 0: Measurement is not completed.
1: Measurement result is reported to D11-0.
D14-12(A2-0) : Measurement mode (A2-0 bits)
D11-0 : Measurement results (12bit)
3-1-1.ADFLT bit = “0”: No average
(1)
70H(ADFLT, DLY3-0, ADEXE1-0) is set. A2-0 and SER bits set the measurement mode at the same time, and 12bit
ADC is powered-up by setting PM12AD bit = “1”.
(2)
After the wait time set by DLY3-0 bits, the measurement is available.
(3)
When 74H is read, then 12bit ADC is executed, data is reported to 74H, and the measurement mode is reported at
next SYNC.
Measurement Method
(default)
S YN C
A 2-0, S E R ,bit
R ead C om m and
S end A D C D ata
A D C M od e
A D E bit
12b it A D C
1010
X M easure
D E LA Y
D 11-D 0 bits
W ait
X X X
X -P os
74h
X -P os
0010
D E L A Y
W ait
P M 1 2A D ,
P IN T E bits
Y M easure
Y-P os
74h
X -M easure
W ait
X -M easure
W ait
74h
Y -M easure
W ait
P en W ait
11
01
DLY3-0 bits = “0H” (1TS)
Figure 41. X and Y position measurement sequence (ADFLT bit = “0”)
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