參數(shù)資料
型號: AK4650VG
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: 16Bit ツヒ CODEC with MIC/HP/SPK-AMP & TSC
中文描述: 16位ツヒ編解碼器麥克風(fēng)/惠普/胰腎聯(lián)合移植腺苷
文件頁數(shù): 42/86頁
文件大?。?/td> 824K
代理商: AK4650VG
[AK4650]
MS0502-E-01
2007/04
- 42 -
Speaker Output
Mono signal [(L+R)/2] converted from stereo DAC output and BEEP input signal can be output via Speaker-amp which
output is BTL. DAC output signal can be input to the Speaker-amp via the ALC2 circuit. This Speaker-amp can output a
maximum of 300mW@ALC2 bit = “0” and 190mW@ALC2 bit = “1”.
ALC2
Po
0
300mW
1
190mW
Table 37. Speaker-Amp Output Power
Speaker blocks (MOUT2, ALC2 and Speaker-amp) can be powered-up/down by controlling the PMSPK bit. When the
PMSPK bit is “0”, the MOUT2, SPP and SPN pins are placed in a Hi-Z state.
When the SPPS bit is “1”, the Speaker-amp is power-save-mode. In this mode, the SPP pin is placed in a Hi-Z state and
the SPN pin goes to HVDD/2 voltage. And then the Speaker output gradually changes to the HVDD/2 voltage and this
mode can reduce pop noise at power-up. When the AK4650 is powered-down, pop noise can be also reduced in
power-save-mode.
PMSPK
SPPS
Mode
(default)
SPP pin
SPN pin
(default
)
0
x
Power-down
Hi-Z
Hi-Z
1
0
Power-save
Normal operation
Table 38. Speaker Output Setting
Hi-Z
HVDD/2
Normal operation
1
Normal operation
PMSPK bit
SPPS bit
SPP pin
SPN pin
HVDD/2
HVDD/2
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Figure 29. Power-up/Power-down Timing for Speaker-amp
Mono Output (MOUT2 pin)
The mixed Lch/Rch signal of DAC is output from the MOUT2 pin. When the MO2 bit is “0”, this output is OFF and the
MOUT2 pin is forced to VCOM voltage. The load impedance is 10k
Ω
(min.). When the PMSPK bit is “0”, the
Speaker-amp enters power-down-mode and the output is placed in a Hi-Z state.
相關(guān)PDF資料
PDF描述
AK4651 16Bit ツヒ CODEC with MIC/HP/SPK-AMP
AK4651VG 16Bit ツヒ CODEC with MIC/HP/SPK-AMP
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AK4665AEN 20-Bit Stereo CODEC with MIC/HP-AMP
AK4671 Stereo CODEC with MIC/RCV/HP-AMP
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