- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385093 > AK4566VN (Asahi Kasei Microsystems Co.,Ltd) 20bit Stereo CODEC with built-in IPGA & HP-AMP PDF資料下載
參數(shù)資料
| 型號： | AK4566VN |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | 20bit Stereo CODEC with built-in IPGA & HP-AMP |
| 中文描述： | 20位立體聲編解碼器內(nèi)置單親遺傳算法 |
| 文件頁數(shù)： | 31/45頁 |
| 文件大?。?/td> | 454K |
| 代理商： | AK4566VN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當(dāng)前第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁
ASAHI KASEI
AKM CONFIDENTIAL
[AK4566]
REV 0.5
2002/2
- 31 -
Addr Register Name
03H
ALC Mode Control 1
Default
D7
0
0
D6
0
0
D5
ALC
0
D4
D3
D2
D1
RATT
0
D0
ZELMN
0
LMAT1
0
LMAT0
0
LMTH
0
LMTH: ALC Limiter Detection Level / Recovery Waiting Counter Reset Level (Table 9)
LMTH
0
1
ALC Limiter Detection Level
ADC Input
≥
6.0dBFS
ADC Input
≥
4.0dBFS
Table 9. ALC1 Limiter Detection Level / Recovery Waiting Counter Reset Level
ALC Recovery Waiting Counter Reset Level
6.0dBFS
>
ADC Input
≥
8.0dBFS
4.0dBFS
>
ADC Input
≥
6.0dBFS
Default
RATT: ALC Recovery GAIN Step (Table 10)
During the ALC recovery operation, the number of steps changed from current IPGA value is set. For
example, when the current IPGA value is 3FH, RATT = “1” is set, IPGA changes to 41H by the ALC
recovery operation, the output signal level is gained by 1dB (=0.5dB x 2). When the IPGA value exceeds the
reference level (REF6-0 bits), the IPGA value does not increase.
RATT
0
1
Table 10. ALC Recovery Gain Step Setting
GAIN STEP
1
2
Default
LMAT1-0: ALC Limiter ATT Step (Table 11)
During the ALC limiter operation, when either Lch or Rch exceeds the ALC limiter detection level set by
LMTH bit, LMAT1-0 bits set the number of steps attenuated from current IPGA value. For example, when
the current IPGA value is 3FH in the state of LMAT1-0 bit = “11”, it becomes IPGA = 3BH by the ALC
limiter operation, the input signal level is attenuated by 2dB (=0.5dB x 4). When the attenuation value
exceeds IPGA = “00H” (Mute), it clips to “00H”.
LMAT1
0
0
1
1
LMAT0
0
1
0
1
ATT STEP
1
2
3
4
Default
Table 11. ALC Limiter ATT Step Setting
ZELMN: Zero Crossing Detection Enable at ALC Limiter Operation
0: Enable (Default)
1: Disable
In case of ZELMN = “0”, when IPGA output detects zero crossing or timeout, the IPGA value is changed by
ALC operation. Zero crossing timeout is the same as ALC recovery operation. In case of ZELMN = “1”, the
IPGA value is changed immediately.
ALC: ALC Enable Flag
0: ALC Disable (Default)
1: ALC Enable
ALC is enabled at ALC bit is “1”. Default: “0” (Disable).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4569 | 20-Bit Stereo CODEC with IPGA & HP-AMP |
| AK4569VN | 20-Bit Stereo CODEC with IPGA & HP-AMP |
| AK4584VQ | 24Bit 96kHz Audio CODEC with DIT/DIR |
| AK4586 | MULTI CHANNEL AUDIO CODEC WITH DIR |
| AK4586VQ | Circular Connector; MIL SPEC:MIL-C-5015 A/B/C; Body Material:Aluminum Alloy; Series:97-3100A; No. of Contacts:4; Connector Shell Size:18; Connecting Termination:Solder; Circular Shell Style:Wall Mount Receptacle RoHS Compliant: No |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4568AER | 功能描述:IC CODEC LOW POWER 制造商:akm semiconductor inc. 系列:* 零件狀態(tài):上次購買時間 標(biāo)準(zhǔn)包裝:1,000 |
| AK4569 | 制造商:AKM 制造商全稱:AKM 功能描述:20-Bit Stereo CODEC with IPGA & HP-AMP |
| AK4569VN | 制造商:AKM 制造商全稱:AKM 功能描述:20-Bit Stereo CODEC with IPGA & HP-AMP |
| AK4571 | 制造商:AKM 制造商全稱:AKM 功能描述:USB I/F Audio CODEC |
| AK4571_05 | 制造商:AKM 制造商全稱:AKM 功能描述:USB Interface Audio CODEC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。