參數(shù)資料
型號(hào): AK4566VN
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: 20bit Stereo CODEC with built-in IPGA & HP-AMP
中文描述: 20位立體聲編解碼器內(nèi)置單親遺傳算法
文件頁數(shù): 21/45頁
文件大?。?/td> 454K
代理商: AK4566VN
ASAHI KASEI
AKM CONFIDENTIAL
[AK4566]
REV 0.5
2002/2
- 21 -
n
De-emphasis Filter
The AK4566 includes a digital de-emphasis filter (tc = 50/15
μ
s) by IIR filter corresponding to three sampling frequencies
(32kHz, 44.1kHz and 48kHz). The de-emphasis filter is enabled by setting DEM1-0 bits (Table 16).
n
Bass Boost Function
By controlling BST1-0 bits, the low frequency boost signal can be output from DAC. The setting value is common in Lch
and Rch (Table 17).
The cut-off frequency (fc) of HPF depends on the external resistor and capacitor values. Table 4 shows the relationship of
external resistor, capacitor, fc and output power, where load resistance of headphone is 16
. Output level of headphone
amp is 1.5Vpp (typ).
AK4566
HP-AMP
16
Headphone
R
C
Figure 16. External Circuit Example of Headphone
R [
]
C [
μ
F]
fc [Hz]
BOOST=OFF
148.6
69.8
105.8
49.7
fc [Hz]
BOOST=MID
65
27
43
20
Output Power [mW]
47
100
47
100
6.8
8.7
16
4.4
Table 4. Relationship of external circuit, output power and frequency response
Note: Cut-off frequency (fc) at BOOST=MID is approximate value.
n
System Reset
The AK4566 should be reset once by bringing PDN “L” upon power-up. After exiting reset, VCOM, IPGA, ADC, DAC,
HPL, HPR and MOUT switch to the power-down state. The contents of the control register are maintained until the reset
is done.
ADC exits reset and power down state by MCLK after PMADC bit is changed to “1”, and then ADC is powered up and the
internal timing starts clocking by LRCK “
”. ADC is in the power-down mode until MCLK and LRCK are input. DAC
also exits reset and power down state when MCLK and LRCK are input after PMDAC= “1”.
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