參數(shù)資料
型號: AK4565
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: LOW POWER 20BIT CODEC WITH BUILT IN ALC
中文描述: 低功耗20位編解碼器中的ALC的建造
文件頁數(shù): 31/33頁
文件大?。?/td> 249K
代理商: AK4565
ASAHI KASEI
[AK4565]
MS0132-E-01
2003/05
- 31 -
1. Grounding and Power Supply Decoupling
The AK4565 requires careful attention to power supply and grounding arrangements. VA is usually supplied from analog
supply in system and VD is supplied from analog supply in system via a resistor of 10 ohms. Alternatively if VA and VD
are supplied separately, the power up sequence is not taken care. VT is a power supply pin to interface with the external ICs
and is supplied from digital supply in the system. AGND and DGND of the AK4565 should be connected to the analog
ground plane. System analog ground and digital ground should be connected together near to where the supplies are
brought onto the printed circuit board. Decoupling capacitors should be as near to the AK4565 as possible, with the small
value ceramic capacitor being the nearest.
2. Voltage Reference
The differential voltage between VREF and AGND sets the analog input/output range. VREF pin is normally connected to
VA with a 0.1
μ
F ceramic capacitor. VCOM is output to 0.45 x VA(typ.) and is a signal ground of this chip. An electrolytic
capacitor 2.2
μ
F parallel with a 0.1
μ
F ceramic capacitor attached to VCOM pin eliminates the effects of high frequency
noise. No load current may be drawn from VCOM pin. All signals, especially clocks, should be kept away from the VREF
and VCOM pins in order to avoid unwanted coupling into the AK4565.
3. Analog Inputs
The analog inputs are single-ended and the input resistance is 10k
(typ) at MIC gain table and 125k
(typ) at LINE gain
table. The input signal range scales with the VREF voltage and nominally 0.6 x VREF Vpp centered in the internal
common voltage. Usually the input signal cuts DC with a capacitor. The cut-off frequency is fc = (1/2
π
RC). The AK4565
can accept input voltages to (VA-0.1) Vpp. The ADC output data format is 2’s complement. The DC offset including
ADC’s own DC offset is removed by the internal HPF (fc=3.7Hz@fs=48kHz).
The AK4565 samples the analog inputs at 64fs. The digital filter rejects noise above the stopband except for multiples of
64fs. The AK4565 includes an anti-aliasing filter (RC filter) to attenuate a noise around 64fs.
4. Analog Outputs
The analog outputs are single-ended and nominally 0.6 x VREF Vpp centered in the internal common voltage. The input
data format is 2’s complement. If the noise generated by the delta-sigma modulator beyond the audio band would be the
problem, the attenuation by external circuit is required.
DC offsets on analog outputs are eliminated by AC coupling since analog outputs have DC offsets of a few mV + VCOM
volrage.
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