參數(shù)資料
型號(hào): AK4565
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: LOW POWER 20BIT CODEC WITH BUILT IN ALC
中文描述: 低功耗20位編解碼器中的ALC的建造
文件頁數(shù): 24/33頁
文件大?。?/td> 249K
代理商: AK4565
ASAHI KASEI
[AK4565]
MS0132-E-01
2003/05
- 24 -
Addr
03H
Register Name
Timer Select
R/W
Default
D7
D6
D5
ZTM1
D4
ZTM0
D3
D2
D1
LTM1
D0
LTM0
FDTM1
FDTM0
WTM1
R/W
WTM0
0
0
0
0
0
0
0
1
LTM1-0: ALC Limiter Period at ZELMN = “1”
The IPGA value is changed immediately. When the IPGA value is changed continuously, the change is
done by the period specified by LTM1-0 bit.
These periods are value at fs=32kHz (FS bit = “0”) or fs=48kHz (FS bit = “1”).
LTM1
LTM0
0
0
0
1
1
0
1
1
Table 4. ALC Limiter Operation Period
WTM1-0: ALC Recovery Waiting Period
A period of recovery operation when any limiter operation does not occur during ALC operation.
Recovery operation is done at period set by WTM1-0 bits.
When the input signal level exceeds auto recovery waiting counter reset level set by LMTH bit, the auto
recovery waiting counter is reset.
The waiting timer starts when the input signal level becomes below the auto recovery waiting counter
reset level.
These periods are value at fs=32kHz (FS bit = “0”) or fs=48kHz (FS bit = “1”).
WTM1
WTM0
0
0
0
1
1
0
1
1
Table 5. ALC Recovery Operation Waiting Period
ZTM1-0: Zero crossing timeout at writing operation by
μ
P, the ALC recovery operation and the ALC limiter
operation at ZELMN = “0”
When IPGA of each L/R channels do zero crossing or timeout independently, the IPGA value is changed
by
μ
P WRITE operation, the ALC recovery operation or the ALC limiter operation at ZELMN = “0”.
These periods are value at fs=32kHz (FS bit = “0”) or fs=48kHz (FS bit = “1”).
ZTM1
ZTM0
0
0
0
1
1
0
1
1
Table 6. Zero Crossing Timeout
Period
63
μ
s
125
μ
s
250
μ
s
500
μ
s
Default
Period
8ms
16ms
64ms
512ms
Default
Period
8ms
16ms
64ms
512ms
Default
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