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參數(shù)資料
| 型號(hào)： | AK2572 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | APC for Burst Mode Applicable Direct Modulation Laser Diode |
| 中文描述： | apc的突發(fā)模式適用的直接調(diào)制激光器 |
| 文件頁數(shù)： | 16/50頁 |
| 文件大?。?/td> | 463K |
| 代理商： | AK2572 |
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ASAHI KASEI
[AK2572]
-16-
<MS0290-E-01>
2004/8
Figure 4-3 APC_FB Functional Block Diagram
R_APC_FB
1/N
PDGAIN
Monitor
PD
APC_
COMP
RE_APC_TRGT
PDIN
PDMON
Rpd
Cpd
DAC_APC
vapc_ref
1/s
EEPROM
DAC
R_DAC2
R_DAC1/R_DAC3
+
comp_out
512kHz [Typ.]
vpd
APC_FF
DIGITAL FILTER
ADC
R_TEMP
APC_FB Initial value setting is possible in
response to temperature at the start-up
A proper APC_FB initial value setting
can shorten the start-up time
TEMPSENS
DAC code is incremented or
decremented by 1 LSB step in order
to prevent the excessive current
Dispersion of monitor PD current
is cancelled and a normalized
voltage is output on PDMON-pin
R_APC_FBIV
4.2.1
APC_FB Circuit Block Diagram
The operation of each block is shown in Table 4-1.
Table 4-1 APC_FB Block Diagram Descriptions
Block
Amplified PDIN voltage by gain value (vpd) and APC target value (vapc_ref) are
compared and if “vpd
＜
vapc_ref”, UP (increment) request or if “vpd
≧
vapc_ref”, DOWN
(decrement) request is output on digital filter. The comparison is made at 512 kHz [Typ.].
DIGITAL
FILTER
are equal.
Amplified PDIN voltage by gain value is output on PDMON-pin. Input range is 0.08 V ~
2.5V. Adjust the gain so that PDMON output voltage is equal to 1.0V [Typ.]. When to set
a normalized voltage lower than 1.0 V, adjust it by utilizing external resistor-divider etc..
APC reference voltage (vapc_ref) is output. Output voltage is adjustable by
RE_APC_TRGT setting. APC_FB operates such that the amplified PDIN voltage by gain
value equals to DAC_APC output.
Function
Note
APC_
COMP
From the APC_COMP result, R_APC_FB value is calculated so that vpd and vapc_ref
PDGAIN
DAC_APC
4.2.2
Normalization of PD Monitoring Current
A monitor PD current is converted into average voltage by an external resistor and a capacitor and it is fed on
PDIN-pin. Input voltage range of PDIN at initial adjustment is listed in Table 4-2.
PDIN voltage is amplified by gain value at PDGAIN block and it is output on PDMON-pin. Adjust PDGAIN so
that output voltage on PDMON-pin is 1.0 V [Typ.]. In Table 4-3, adjustable range of RE_PDGAIN is listed.
When a lower than 1.0 V [Typ.] is required as a normalized voltage, voltage-divide it by an external
resistor-divider etc..
Table 4-2 PDIN Input Condition
Item
PDIN input voltage
Min.
0.08V
Max.
2.5V
Note
Table 4-3
PDGAIN Setting
RE_PDGAIN
00 0000 (00h)
00 0001 (01h)
11 1110 (3Eh)
11 1111 (3Fh)
Set-up gain
［
Typ.
］
23.5 dB
23.0 dB
- 7.5 dB
- 8.0 dB
Note
0.5 dB / step
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