參數(shù)資料
型號(hào)： ADUC7122BBCZ-RL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 30/96頁(yè)
文件大?。?/td> 0K
描述： PRECISION ANALOG MCU I.C
標(biāo)準(zhǔn)包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 41.78MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 126KB（63K x 16）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 13x12b，D/A 12x12b
振蕩器型： 內(nèi)部
工作溫度： -10°C ~ 95°C
封裝/外殼： 108-LFBGA，CSPBGA
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： ADUC7122BBCZ-RLDKR
ADuC7122
Rev. 0 | Page 36 of 96
NONVOLATILE FLASH/EE MEMORY
FLASH/EE MEMORY OVERVIEW
The ADuC7122 incorporates Flash/EE memory technology
on-chip to provide the user with nonvolatile, in-circuit
reprogrammable memory space.
Like EEPROM, Flash memory can be programmed in-system
at a byte level, although it must first be erased. The erase is
performed in page blocks. As a result, Flash memory is often
and more correctly referred to as Flash/EE memory.
Overall, Flash/EE memory represents a step closer to the ideal
memory device that includes no volatility, in-circuit program-
mability, high density, and low cost. Incorporated in the
ADuC7122, Flash/EE memory technology allows the user to
update program code space in-circuit, without the need to
replace one-time programmable (OTP) devices at remote
operating nodes.
FLASH/EE MEMORY
The ADuC7122 contains two 64 kB arrays of Flash/EE memory.
In the upper block of Flash/EE memory, the bottom 62 kB are
available to the user and the top 2 kB of this Flash/EE program
memory array contain permanently embedded firmware, allow-
ing in-circuit serial download. The 2 kB of embedded firmware
also contain a power-on configuration routine that downloads
factory-calibrated coefficients to the various calibrated peripherals
(band gap references and so on). This 2 kB embedded firmware is
hidden from user code. It is not possible for the user to read, write,
or erase this page. In the second block, all 64 kB of Flash/EE
memory are available to the user.
The 126 kB of Flash/EE memory can be programmed in-circuit,
using the serial download mode or the JTAG mode provided.
Flash/EE Memory Reliability
The Flash/EE memory arrays on the ADuC7122 is fully
qualified for two key Flash/EE memory characteristics:
Flash/EE memory cycling endurance and Flash/EE memory
data retention.
Endurance quantifies the ability of the Flash/EE memory
to be cycled through many program, read, and erase cycles.
A single endurance cycle is composed of four independent,
sequential events:
1.
Initial page erase sequence
2.
Read/verify a single Flash/EE sequence
3.
Byte program memory sequence
4.
Second read/verify endurance cycle sequence
In reliability qualification, three separate page blocks from each
Flash/EE memory block is tested. An entire Flash/EE page at
the top, middle, and bottom of each Flash/EE memory block is
cycled 10,000 times from 0x0000 to 0xFFFF.
As indicated in the General Description section, the Flash/EE
memory endurance qualification is carried out in accordance with
JEDEC Retention Lifetime Specification A117 over the industrial
temperature range of –10° to +95°C. The results allow the
specification of a minimum endurance figure over a varying
supply across the industrial temperature range for 10,000 cycles.
Retention quantifies the ability of the Flash/EE memory to
retain its programmed data over time. The parts are qualified
in accordance with the formal JEDEC Retention Lifetime
Specification (A117) at a specific junction temperature (TJ =
85°C). As part of this qualification procedure, the Flash/EE
memory is cycled to its specified endurance limit, described
previously, before data retention is characterized. This means
that the Flash/EE memory is guaranteed to retain its data for
its fully specified retention lifetime every time the Flash/EE
memory is reprogrammed. Note, too, that retention lifetime,
based on activation energy of 0.6 eV, derates with TJ, as shown
150
300
450
600
30
40
55
70
85
100
125
135
150
RE
T
E
N
T
IO
N
(
Y
ea
rs
)
0
08
75
5-
02
6
JUNCTION TEMPERATURE (°C)
Figure 25. Flash/EE Memory Data Retention
Serial Downloading (In-Circuit Programming)
The ADuC7122 facilitates code download via the I2C serial
port. The ADuC7122 enters serial download mode after a reset
or power cycle if the BM pin is pulled low through an external
1 kΩ resistor. This is combined with the state of Address
0x00014 in Flash. If this address is 0xFFFFFFFF and the BM pin
is pulled low, the part enters download mode; if this address
contains any other value, user code is executed. When in serial
download mode, the user can download code to the full 126 kB
of Flash/EE memory while the device is in-circuit in its target appli-
cation hardware. A PC executable serial download and hardware
dongle are provided as part of the development system for serial
downloads via the I2C port.
JTAG Access
The JTAG protocol uses the on-chip JTAG interface to facilitate
code download and debug.
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