VDD = 3.5 V to 18 V, VREF = 1.2 V internal reference; f
參數(shù)資料
型號: ADUC7032BSTZ-88
廠商: Analog Devices Inc
文件頁數(shù): 55/120頁
文件大?。?/td> 0K
描述: IC MCU 96K FLASH DUAL 48LQFP
標(biāo)準(zhǔn)包裝: 1
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 20.48MHz
連通性: LIN,SPI,UART/USART
外圍設(shè)備: POR,PSM,溫度傳感器,WDT
輸入/輸出數(shù): 9
程序存儲器容量: 96KB(48K x 16)
程序存儲器類型: 閃存
RAM 容量: 1.5K x 32
電壓 - 電源 (Vcc/Vdd): 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 48-LQFP
包裝: 托盤
ADuC7032-8L
Rev. A | Page 4 of 120
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
VDD = 3.5 V to 18 V, VREF = 1.2 V internal reference; fCORE = 10.24 MHz, driven from external 32.768 kHz watch crystal or on-chip
precision oscillator. All specifications TA = 40°C to +105°C, unless otherwise noted.
Table 1.
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
ADC SPECIFICATIONS
Conversion Rate1
Chop off, ADC normal operating mode
4
8000
Hz
Chop on, ADC normal operating mode
4
2600
Hz
Chop on, ADC low power mode
1
650
Hz
Current Channel
No Missing Codes1
Valid for all ADC update rates and ADC modes
16
Bits
Integral Nonlinearity1, 2
±10
±60
ppm of FSR
Chop off, 1 LSB = (36.6/gain) μV, after initial offset calibration
10
±3
+10
LSB
Chop off, 1 LSB = (36.6/gain) μV
15
+35
LSB
Chop on
2
±0.5
+2
μV
Offset Error1, 3
Chop on, low power mode or low power plus mode, MCU powered
down
0
200
650
nV
Offset Error1, 3
Chop on, normal mode, CD = 1
0
1.5
5
μV
Offset Error Drift6
Chop off, valid for ADC gains of 4 to 64, normal mode
0.03
LSB/°C
Offset Error Drift6
Chop off, valid for ADC gains of 128 to 512, normal mode
30
nV/°C
Offset Error Drift6
Chop on
10
nV/°C
Total Gain Error1, 3, 7, 8, 9
Normal mode
0.5
±0.1
+0.5
%
Total Gain Error1, 3, 7, 9, 10
Low power mode
4
±0.2
+4
%
Total Gain Error1, 3, 7, 9
Low power plus mode, using precision VREF
1
±0.2
+1
%
Gain Drift
3
ppm/°C
PGA Gain Mismatch Error
±0.1
%
Output Noise1, 11
4 Hz update rate, gain = 512, chop enabled
60
90
nV rms
10 Hz update rate, gain = 512, chop enabled
100
150
nV rms
1 kHz update rate, gain = 512
0.6
0.9
μV rms
1 kHz update rate, gain = 32
0.8
1.2
μV rms
1 kHz update rate, gain = 4
2.0
2.8
μV rms
8 kHz update rate, gain = 32
2.5
3.5
μV rms
8 kHz update rate, gain = 4
14
21
μV rms
ADC low power mode, fADC = 10 Hz, gain = 128
1.25
1.9
μV rms
ADC low power mode, fADC = 1 Hz, gain = 128
0.35
0.5
μV rms
ADC low power plus mode, fADC = 1 Hz, gain = 512
0.1
0.15
μV rms
Voltage Channel12
No Missing Codes1
Valid at all ADC update rates
16
Bits
Integral Nonlinearity1
±10
±60
ppm of FSR
Chop off, 1 LSB = 439.5 μV
10
±1
+10
LSB
Offset Error1, 3
Chop on
0.3
1
LSB
Offset Error Drift
Chop off
0.03
LSB/°C
Total Gain Error1, 3, 7, 13, 14
Includes resistor mismatch
0.25
±0.06
+0.25
%
Total Gain Error1, 3, 7, 13, 14
Temperature range = 25°C to +65°C
0.15
±0.03
+0.15
%
Gain Drift
Includes resistor mismatch drift
3
ppm/°C
Output Noise1, 15
4 Hz update rate
60
90
μV rms
10 Hz update rate
60
90
μV rms
1 kHz update rate
180
270
μV rms
8 kHz update rate
1600
2400
μV rms
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