參數(shù)資料
型號： ADUC7032BSTZ-88
廠商： Analog Devices Inc
文件頁數(shù)： 107/120頁
文件大?。?/td> 0K
描述： IC MCU 96K FLASH DUAL 48LQFP
標(biāo)準(zhǔn)包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設(shè)備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 96KB（48K x 16）
程序存儲器類型： 閃存
RAM 容量： 1.5K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 托盤
ADuC7032-8L
Rev. A | Page 87 of 120
GPIO Port0 Clear Register
Name:
GP0CLR
Address:
0xFFFF0D28
Access:
Write only
Function:
This 32-bit MMR allows user code to individually bit address external GPIO pins to clear them low only. User code can do this via the
GP0CLR MMR without needing to modify or maintain the status of any other GPIO pins, as user code needs to do when using GP0DAT.
Table 68. GP0CLR MMR Bit Designations
Bit
Description
31 to 21
Reserved. These bits are reserved and should be written as 0 by user code.
20
Port0.4 Clear Bit.
Set to 1 by user code to clear the external GPIO_4 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_4 pin.
19
Port0.3 Clear Bit.
Set to 1 by user code to clear the external GPIO_3 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_3 pin.
18
Port0.2 Clear Bit.
Set to 1 by user code to clear the external GPIO_2 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_2 pin.
17
Port0.1 Clear Bit.
Set to 1 by user code to clear the external GPIO_1 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_1 pin.
16
Port0.0 Clear Bit.
Set to 1 by user code to clear the external GPIO_0 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_0 pin.
15 to 0
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO Port1 Clear Register
Name:
GP1CLR
Address:
0xFFFF0D38
Access:
Write only
Function:
This 32-bit MMR allows user code to individually bit address external GPIO pins to clear them low only. User code can do this via the
GP1CLR MMR without needing to modify or maintain the status of any other GPIO pins, as user code needs to do when using GP1DAT.
Table 69. GP1CLR MMR Bit Designations
Bit
Description
31 to 18
Reserved. These bits are reserved and should be written as 0 by user code.
17
Port1.1 Clear Bit.
Set to 1 by user code to clear the external GPIO_6 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_6 pin.
16
Port1.0 Clear Bit.
Set to 1 by user code to clear the external GPIO_5 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_5 pin.
15 to 0
Reserved. These bits are reserved and should be written as 0 by user code.
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