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參數(shù)資料
| 型號： | ADT7518ARQZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 32/40頁 |
| 文件大?。?/td> | 891K |
| 描述： | IC SENSOR TEMP QD ADC/DAC 16QSOP |
| 標準包裝： | 98 |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器） |
| 傳感器類型： | 內(nèi)部和外部 |
| 感應(yīng)溫度： | -40°C ~ 120°C，外部傳感器 |
| 精確度： | ±3°C（最小值） |
| 拓撲： | ADC，比較器，多路復(fù)用器，寄存器庫 |
| 輸出類型： | I²C?，MICROWIRE?，QSPI?，SPI? |
| 輸出警報： | 無 |
| 輸出風(fēng)扇： | 無 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 120°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-QSOP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 798 (CN2011-ZH PDF) |
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ADT7518
Rev. A | Page 32 of 40
V
DD
V
LOW
Limit Register (Read/Write) [Address = 24h]
This limit register is an 8-bit read/write register that stores the
VDD lower limit, which will cause an interrupt and activate the
INT/INT
output (if enabled). For this to happen, the measured
V
DD
value has to be less than or equal to the value in this
register. The default value is 2.7 V.
Table 48. V
DD
V
LOW
Limit
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
0*
1*
1*
0*
0*
0*
1*
0*
* Default settings at power-up
Internal T
HIGH
Limit Register (Read/Write) [Address = 25h]
This limit register is an 8-bit read/write register that stores the
twos complement of the internal temperature upper limit,
which will cause an interrupt and activate the INT/INT
output
(if enabled). For this to happen, the measured internal temp-
erature value has to be greater than the value in this register.
Because it is an 8-bit register, the temperature resolution is 1癈.
The default value is +100癈.
Table 49. Internal THIGH Limit
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
0*
1*
1*
0*
0*
1*
0*
0*
* Default settings at power-up
Internal TLOW Limit Register (Read/Write) [Address = 26h]
This limit register is an 8-bit read/write register that stores the
twos complement of the internal temperature lower limit, which
will cause an interrupt and activate the INT/INT
output (if
enabled). For this to happen, the measured internal temperature
value has to be more negative than or equal to the value in this
register. Because it is an 8-bit register, the temperature reso-
lution is 1癈. The default value is 55癈.
Table 50. Internal T
LOW
Limit
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
1*
1*
0*
0*
1*
0*
0*
1*
* Default settings at power-up
External THIGH/AIN1 VHIGH Limit Register (Read/Write)
[Address = 27h]
If Pins 7 and 8 are configured for the external temperature
sensor, this limit register is an 8-bit read/write register that
stores the twos complement of the external temperature upper
limit, which will cause an interrupt and activate the INT/INT
output (if enabled). For this to happen, the measured external
temperature value has to be greater than the value in this reg-
ister. Because it is an 8-bit register, the temperature resolution is
1癈. The default value is 1癈.
If Pins 7 and 8 are configured for AIN1 and AIN2 inputs, this
limit register is an 8-bit read/write register that stores the AIN1
input upper limit, which will cause an interrupt and activate the
INT/INT
output (if enabled). For this to happen, the measured
AIN1 value has to be greater than the value in this register.
Because it is an 8-bit register, the resolution is four times less
than the resolution of the 10-bit ADC. Because the power-up
default settings for Pins 7 and 8 are AIN1 and AIN2 inputs, the
default value for this limit register is full-scale voltage.
Table 51. AIN1 V
HIGH
Limit
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
1*
1*
1*
1*
1*
1*
1*
1*
* Default settings at power-up
External T
LOW
/AIN1 V
LOW
Limit Register (Read/Write)
[Address = 28h]
If Pins 7 and 8 are configured for the external temperature
sensor, this limit register is an 8-bit read/write register that
stores the twos complement of the external temperature lower
limit, which will cause an interrupt and activate the INT/INT
output (if enabled). For this to happen, the measured external
temperature value has to be more negative than or equal to the
value in this register. Because it is an 8-bit register, the temp-
erature resolution is 1癈. The default value is 0癈.
If Pins 7 and 8 are configured for AIN1 and AIN2 inputs, this
limit register is an 8-bit read/write register that stores the AIN1
input lower limit, which will cause an interrupt and activate the
INT/
INT
output (if enabled). For this to happen, the measured
AIN1 value has to be less than or equal to the value in this reg-
ister. As it is an 8-bit register, the resolution is four times less
than the resolution of the 10-bit ADC. Because the power-up
default settings for Pins 7 and 8 are AIN1 and AIN2 inputs, the
default value for this limit register is 0 V.
Table 52. AIN1 VLOW Limit
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
0*
0*
0*
0*
0*
0*
0*
0*
* Default settings at power-up
AIN2 V
HIGH
Limit Register (Read/Write) [Address = 2Bh]
This limit register is an 8-bit read/write register that stores the
AIN2 input upper limit, which will cause an interrupt and acti-
vate the INT/INT
output (if enabled). For this to happen, the
measured AIN2 value has to be greater than the value in this
register. Because it is an 8-bit register, the resolution is four
times less than the resolution of the 10-bit ADC. The default
value is full-scale voltage.
Table 53. AIN2 VHIGH Limit
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
1*
1*
1*
1*
1*
1*
1*
1*
* Default settings at power-up
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