參數(shù)資料
型號: ADT7476AARQZ-R
廠商: ON Semiconductor
文件頁數(shù): 50/66頁
文件大小: 945K
描述: IC REMOTE THERMAL CTLR 24QSOP
產(chǎn)品變化通告: MFG CHG Notification ADI to ON Semi
QSOP 24ld Pkg (MSL) Change 17/Jun/2010
標準包裝: 2,500
系列: dBCool®
功能: 風扇控制,溫度監(jiān)控器
傳感器類型: 內(nèi)部和外部
感應(yīng)溫度: -40°C ~ 125°C
精確度: ±2.5%
拓撲: ADC,比較器,風扇速度計數(shù)器,多路復(fù)用器,寄存器庫
輸出類型: SMBus?
輸出警報:
輸出風扇:
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 24-QSOP
包裝: 帶卷 (TR)
其它名稱: ADT7476AARQZ-R-ND
ADT7476AARQZ-ROSTR
ADT7476A
http://onsemi.com
50
Table 52. VOLTAGE READING REGISTERS (POWER-ON DEFAULT = 0x00) (Note 1)
Register Address
R/W
Description
0x20
Read-only
Reflects the Voltage Measurement at the 2.5 V Input on Pin 22 (8 MSBs of Reading)
0x21
Read-only
Reflects the Voltage Measurement (Note 2) at the V
CCP
 Input on Pin 23 (8 MSBs of Reading)
0x22
Read-only
Reflects the Voltage Measurement (Note 3) at the V
CC
 Input on Pin 4 (8 MSBs of Reading)
0x23
Read-only
Reflects the Voltage Measurement at the 5.0 V Input on Pin 20 (8 MSBs of Reading)
0x24
Read-only
Reflects the Voltage Measurement at the 12 V Input on Pin 21 (8 MSBs of Reading)
1.  If the extended resolution bits of these readings are also being read, the extended resolution registers (Register 0x76, Register 0x77) must
be read first. Once the extended resolution registers have been read, the associated MSB reading registers are frozen until read. Both the
extended resolution registers and the MSB registers are frozen.
2.  If V
CCP
Low (Bit 7 of 0x40) is set, V
CCP
 can control the sleep state of the ADT7476A.
3.  V
CC
 (Pin 4) is the supply voltage for the ADT7476A.
Table 53. TEMPERATURE READING REGISTERS (POWER-ON DEFAULT = 0x80) (Note 1. 2 and 3)
Register Address
R/W
Description
0x25
Read-only
Remote 1 Temperature Reading (Note 3 and 4) (8 MSBs of Reading)
0x26
Read-only
Local Temperature Reading (8 MSBs of Reading)
0x27
Read-only
Remote 2 Temperature Reading (Note 3 and 4) (8 MSBs of Reading)
1.  If the extended resolution bits of these readings are also being read, the extended resolution registers (Register 0x76, Register 0x77) must
be read first. Once the extended resolution registers have been read, all associated MSB reading registers are frozen until read. Both the
extended resolution registers and the MSB registers are frozen.
2.  These temperature readings can be in twos complement or Offset 64 format; this interpretation is determined by Bit 0 of Configuration
Register 5 (0x7C).
3.  In twos complement mode, a temperature reading of 128癈 (0x80) indicates a diode fault (open or short) on that channel.
4.  In Offset 64 mode, a temperature reading of 64癈 (0x00) indicates a diode fault (open or short) on that channel.
Table 54. FAN TACHOMETER READING REGISTERS (POWER-ON DEFAULT = 0x00) (Note 1)
Register Address
R/W
Description
0x28
Read-only
TACH1 Low Byte
0x29
Read-only
TACH1 High Byte
0x2A
Read-only
TACH2 Low Byte
0x2B
Read-only
TACH2 High Byte
0x2C
Read-only
TACH3 Low Byte
0x2D
Read-only
TACH3 High Byte
0x2E
Read-only
TACH4 Low Byte
0x2F
Read-only
TACH4 High Byte
1.  These registers count the number of 11.11 ms periods (based on an internal 90 kHz clock) that occur between a number of consecutive fan TACH
pulses (default = 2). The number of TACH pulses used to count can be changed using the TACH Pulses per Revolution register (Register 0x7B).
This allows the fan speed to be accurately measured. Because a valid fan tachometer reading requires that two bytes be read, the low byte must
be read first. Both the low and high bytes are then frozen until read. At power-on, these registers contain 0x0000 until the first valid fan TACH
measurement is read into these registers. This prevents false interrupts from occurring while the fans are spinning up. A count of 0xFFFF
indicates that a fan is one of the following: stalled or blocked (object jamming the fan), failed (internal circuitry destroyed), or not populated. (The
ADT7476A expects to see a fan connected to each TACH. If a fan is not connected to that TACH, its TACH minimum high and low bytes should
be set to 0xFFFF.) An alternate function, for example, is TACH4 reconfigured as the THERM
 pin.
Table 55. CURRENT PWM DUTY CYCLE REGISTERS (POWER-ON DEFAULT = 0xFF) (Note 1)
Register Address
R/W
Description
0x30
R/W
PWM1 Current Duty Cycle (0% to 100% Duty Cycle = 0x00 to 0xFF)
0x31
R/W
PWM2 Current Duty Cycle (0% to 100% Duty Cycle = 0x00 to 0xFF)
0x32
R/W
PWM3 Current Duty Cycle (0% to 100% Duty Cycle = 0x00 to 0xFF)
1.  These registers reflect the PWM duty cycle driving each fan at any given time. When in automatic fan speed control mode, the ADT7476A
reports the PWM duty cycles back through these registers. The PWM duty cycle values vary according to temperature in automatic fan speed
control mode. During fan startup, these registers report back 0x00. In manual mode, the PWM duty cycle outputs can be set to any duty cycle
value by writing to these registers.
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