參數(shù)資料
型號： ADSP-BF548MBBCZ-5M
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字信號處理
英文描述： 533 MHz Blackfin Embedded Processor: ADSP-BF548MBBCZ-5M Temp Range: –40°C to +85°C Package: 400-Ball CSP_BGA BC-400-1
中文描述： 16-BIT, 50 MHz, OTHER DSP, PBGA400
封裝： 17 X 17 MM, ROHS COMPLIANT, CSBGA-400
文件頁數(shù)： 28/100頁
文件大?。?/td> 3095K
代理商： ADSP-BF548MBBCZ-5M
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
Rev. D
|
Page 33 of 100
|
May 2011
SPECIFICATIONS
OPERATING CONDITIONS
Parameter
Conditions
Min
Nominal
Max
Unit
VDDINT
1, 2
1 See Table 12 on Page 34 for frequency/voltage specifications.
2 V
DDINT maximum is 1.10 V during one-time-programmable (OTP) memory programming operations.
Internal Supply Voltage
Nonautomotive grade models
0.9
1.43
V
Internal Supply Voltage
Automotive and extended temp
grade models
1.0
1.38
V
Internal Supply Voltage
Mobile DDR SDRAM models
1.14
1.31
V
VDDEXT
3
3 VDDEXT minimum is 3.0 V and maximum is 3.6 V during OTP memory programming operations.
External Supply Voltage
Nonautomotive 3.3 V I/O
2.7
3.3
3.6
V
External Supply Voltage
Nonautomotive 2.5 V I/O
2.25
2.5
2.75
V
External Supply Voltage
Automotive and extended temp
grade models
2.7
3.3
3.6
V
VDDUSB
USB External Supply Voltage
3.0
3.3
3.6
V
VDDMP
MXVR PLL Supply Voltage
Nonautomotive grade models
0.9
1.43
V
MXVR PLL Supply Voltage
Automotive and extended temp
grade models
1.0
1.38
V
VDDRTC
Real Time Clock Supply Voltage
Nonautomotive grade models
2.25
3.6
V
Real Time Clock Supply Voltage
Automotive and extended temp
grade models
2.7
3.3
3.6
V
VDDDDR
DDR Memory Supply Voltage
DDR SDRAM models
2.5
2.6
2.7
V
DDR Memory Supply Voltage
Mobile DDR SDRAM models
1.8
1.875
1.95
V
VDDVR
4
4 Use of the internal voltage regulator is not supported on 600 MHz speed grade models or on automotive grade models. An external voltage regulator must be used.
Internal Voltage Regulator
Supply Voltage
2.7
3.3
3.6
V
VIH
High Level Input Voltage5, 6
5 Bidirectional pins (D15–0, PA15–0, PB14–0, PC15–0, PD15–0, PE15–0, PF15–0, PG15–0, PH13–0, PI15–0, PJ14–0) and input pins (ATAPI_PDIAG, USB_ID, TCK, TDI,
TMS, TRST, CLKIN, RESET, NMI, and BMODE3–0) of the ADSP-BF54x Blackfin processors are 3.3 V-tolerant (always accept up to 3.6 V maximum VIH). Voltage
compliance (on outputs, VOH) is limited by the VDDEXT supply voltage. The regulator can generate VDDINT at levels of 0.90 V to 1.30 V with -5% to +5% tolerance.
6 Parameter value applies to all input and bidirectional pins except PB1-0, PE15-14, PG15–11, PH7-6, DQ0-15, and DQS0-1.
VDDEXT =maximum
2.0
3.6
V
VIHDDR
High Level Input Voltage
7
7 Parameter value applies to pins DQ0–15 and DQS0–1.
DDR SDRAM models
VDDR_VREF + 0.15
VDDDDR + 0.3
V
High Level Input Voltage7
Mobile DDR SDRAM models
VDDR_VREF + 0.125
VDDDDR + 0.3
V
VIH5V
High Level Input Voltage8
8 PB1-0, PE15-14, PG15-11, and PH7-6 are 5.0 V-tolerant (always accept up to 5.5 V maximum VIH when power is applied to VDDEXT pins). Voltage compliance (on output
VOH) is limited by VDDEXT supply voltage.
VDDEXT =maximum
2.0
5.5
V
VIHTWI
High Level Input Voltage
9, 13
VDDEXT =maximum
0.7 × VDDEXT
5.5
V
VIHUSB
High Level Input Voltage10
5.25
V
VIL
Low Level Input Voltage5, 11
VDDEXT = minimum
–0.3
0.6
V
VIL5V
Low Level Input Voltage
12
3.3 V I/O, VDDEXT = minimum
–0.3
0.8
V
Low Level Input Voltage12
2.5 V I/O, VDDEXT = minimum
–0.3
0.6
V
VILDDR
Low Level Input Voltage7
DDR SDRAM models
–0.3
VDDR_VREF – 0.15
V
Low Level Input Voltage
Mobile DDR SDRAM models
–0.3
VDDR_VREF – 0.125 V
VILTWI
Low Level Input Voltage9, 13
–0.3
0.3 × VDDEXT
V
VDDR_VREF
DDR_VREF Pin Input Voltage
0.49 × VDDDDR
0.50 x
VDDDDR
0.51 × VDDDDR
V
TJ
14
Junction Temperature
(400/533 MHz)
400-Ball CSP_BGA @TAMBIENT =
–40C to +85C
–40
+105
C
Junction Temperature
(600 MHz)
400-Ball CSP_BGA @TAMBIENT =
0C to +70C
0+90
C
Junction Temperature
(400 MHz)
400-Ball CSP_BGA @TAMBIENT =
–40
C to +105C
–40
+125
C
相關(guān)PDF資料
PDF描述
ADSP-BF548BBCZ-5A 533 MHz Blackfin Embedded Processor: ADSP-BF548BBCZ-5A Temp Range: –40°C to +85°C Package: 400-Ball CSP_BGA BC-400-1
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