參數(shù)資料
型號(hào): ADSP-21479KSWZ-2A
廠商: Analog Devices Inc
文件頁(yè)數(shù): 13/72頁(yè)
文件大?。?/td> 0K
描述: IC DSP SHARC 266MHZ LP 100LQFP
標(biāo)準(zhǔn)包裝: 1
系列: SHARC®
類型: 浮點(diǎn)
接口: DAI,DPI,EBI/EMI,I²C,SPI,SPORT,UART/USART
時(shí)鐘速率: 266MHz
非易失內(nèi)存: ROM(4Mb)
芯片上RAM: 5Mb
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.20V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-LQFP-EP(14x14)
包裝: 托盤
其它名稱: Q6418433
Rev. A
|
Page 20 of 72
|
September 2011
ELECTRICAL CHARACTERISTICS
100 MHz
266 MHz
300 MHz
Unit
Parameter
1
Description
Test Conditions
Min
Max
Min
Max
Min
Max
VOH
2
High Level Output
Voltage
@ VDD_EXT = Min,
IOH = –1.0 mA
3
2.4
V
VOL
Low Level Output Voltage @ VDD_EXT = Min,
IOL = 1.0 mA
0.4
V
IIH
4, 5
High Level Input Current
@ VDD_EXT = Max,
VIN = VDD_EXT Max
10
μA
IIL
Low Level Input Current
@ VDD_EXT = Max, VIN
= 0 V
–10
μA
IILPU
Low Level Input Current
Pull-up
@ VDD_EXT = Max, VIN
= 0 V
200
μA
IOZH
6, 7
Three-State Leakage
Current
@ VDD_EXT = Max,
VIN = VDD_EXT Max
10
μA
IOZL
Three-State Leakage
Current
@ VDD_EXT = Max, VIN
= 0 V
–10
μA
IOZLPU
Three-State Leakage
Current Pull-up
@ VDD_EXT = Max, VIN
= 0 V
200
μA
IOZHPD
8
Three-State Leakage
Current Pull-down
@ VDD_EXT = Max, VIN
= VDD_EXT Max
200
μA
IDD_RTC
VDD_RTC Current
@ VDD_RTC = 3.0,
TJ = 25°C
0.76
μA
IDD-INTYP
9
Supply Current (Internal)
fCCLK > 0 MHz
ASF
ASF
ASF
mA
CIN
10, 11
Input Capacitance
TCASE = 25°C
5
pF
1 Specifications subject to change without notice.
2 Applies to output and bidirectional pins: ADDR23-0, DATA15-0, AMI_RD, AMI_WR, FLAG3–0, DAI_Px, DPI_Px, EMU, TDO, RESETOUT ,MLBSIG, MLBDAT, MLBDO,
MLBSO, SDRAS, SDCAS, SDWE, SDCKE, SDA10, SDDQM, MS0-1.
3 See Output Drive Currents on Page 61 for typical drive current capabilities.
4 Applies to input pins: BOOT_CFGx, CLK_CFGx, TCK, RESET, CLKIN.
5 Applies to input pins with internal pull-ups: TRST, TMS, TDI.
6 Applies to three-statable pins: TDO, MLBDAT, MLBSIG, MLBDO, and MLBSO.
7 Applies to three-statable pins with pull-ups: DAI_Px, DPI_Px, EMU.
8 Applies to three-statable pin with pull-down: SDCLK.
9 See Engineer-to-Engineer Note “Estimating Power Dissipation for ADSP-2147x SHARC Processors” for further information.
10Applies to all signal pins.
11Guaranteed, but not tested.
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