參數(shù)資料
型號(hào)： ADS8517IPWR
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PDSO28
封裝： GREEN, PLASTIC, TSSOP-28
文件頁數(shù)： 4/38頁
文件大?。?/td> 948K
代理商： ADS8517IPWR
BASIC OPERATION
PARALLEL OUTPUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ADS8517
+5 V
+
ConvertPulse
40nsmin
0.1 mF
10 mF
+
NOTE:(1)NC=notconnected.
B11
B12
B13
B14
B15
(MSB)
Pin21
LOW
B3
B4
B5
B6
B7
Pin21
HIGH
NC
(1)
B8
B9
B10
B0
(LSB)
B1
B2
BUSY
R/C
BYTE
±10 V
2.2 F
m
+5V
2.2 F
m
+1.8V
0.1 F
m
SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com
Figure 28 shows a basic circuit for operating the ADS8517 with a ±10-V input range and parallel output. Taking
R/C (pin 22) low for a minimum of 40 ns (5
s max) initiates a conversion. BUSY (pin 24) goes low and stays low
until the conversion completes and the output register updates. If BYTE (pin 21) is low, the eight most significant
bits (MSBs) will be valid when BUSY rises; if BYTE is high, the eight least significant bits (LSBs) will be valid
when BUSY rises. Data are output in binary twos complement (BTC) format. BUSY going high can be used to
latch the data. After the first byte has been read, BYTE can be toggled, allowing the remaining byte to be read.
All convert commands are ignored while BUSY is low.
The ADS8517 begins tracking the input signal at the end of the conversion. Allowing 5
s between convert
commands assures accurate acquisition of a new signal.
Figure 28. Basic ±10-V Operation, Both Parallel and Serial Output
12
Copyright 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): ADS8517
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