參數(shù)資料
型號(hào)： ADS8517IPWR
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PDSO28
封裝： GREEN, PLASTIC, TSSOP-28
文件頁(yè)數(shù)： 33/38頁(yè)
文件大?。?/td> 948K
代理商： ADS8517IPWR
SLAS527A – SEPTEMBER 2008 – REVISED JUNE 2009 ................................................................................................................................................. www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
At TA = -40°C to +85°C, fS = 200 kHz, VDIG = VANA = 5 V, using internal reference (see Figure 39), unless otherwise noted.
ADS8517I
ADS8517IB(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
REFERENCE
Internal reference voltage
No load
2.48
2.5
2.52
2.48
2.5
2.52
V
Internal reference source current
1
A
(must use external buffer)
Internal reference drift
8
ppm/°C
External reference voltage range
2.3
2.5
2.7
2.3
2.5
2.7
V
for specified linearity
External reference current drain
External 2.5-V reference
100
A
DIGITAL INPUTS
VIL
Low-level input voltage(9)
VDIG = 1.65 V to 5.5 V
–0.3
0.6
–0.3
0.6
V
VIH
High-level input voltage(9)
VDIG = 1.65 V to 5.5 V
0.5 x VDIG
VDIG + 0.3
0.5 x VDIG
VDIG + 0.3
V
IIL
Low-level input current
VIL = 0 V
±10
A
IIH
High-level input current
VIH = 5 V
±10
A
DIGITAL OUTPUTS
Data format - Parallel 16-bits in 2-bytes, Serial
Data coding - Binary twos complement or straight binary
ISINK = 1.6mA,
VOL
Low-level output voltage
0.45
V
VDIG = 1.65V to 5.5V
ISOURCE = 500A,
VOH
High-level output voltage
VDIG – 0.45
V
VDIG = 1.65V to 5.5V
High-Z state,
Leakage current
±5
A
VOUT = 0 V to VDIG
Output capacitance
High-Z state
15
pF
DIGITAL TIMING
Bus access time
RL = 3.3 k, CL = 50 pF
83
ns
Bus relinquish time
RL = 3.3 k, CL = 10 pF
83
ns
POWER SUPPLIES
VDIG
Interface voltage
1.65
1.8
5.5
1.65
1.8
5.5
V
VANA
ADC core voltage
4.5
5
5.5
4.5
5
5.5
V
IDIG
Interface current
VDIG = 5 V
0.3
mA
IANA
ADC core current
VANA = 5 V
9
mA
VANA = VDIG = 5 V,
47
60
47
60
mW
fS = 200 kHz
Power dissipation
REFD high with BUF on
42
mW
PWRD and REFD high
50
W
TEMPERATURE RANGE
Specified performance
–40
+85
–40
+85
°C
Derated performance
–55
+125
–55
+125
°C
Storage temperature
–65
+150
–65
+150
°C
TSSOP
62
θ
JA
Thermal impedance
°C/W
SO
46
(9)
TTL-compatible at 5V supply.
Table 1. Analog Input Range Connections (see Figure 38 and Figure 39)
ANALOG INPUT
RANGE
CONNECT R1IN VIA 200 TO
CONNECT R2IN VIA 100 TO
IMPEDANCE
±10 V
VIN
CAP
45.7 k
0 V to 5 V
AGND
VIN
20.0 k
0 V to 4 V
VIN
21.4 k
4
Copyright 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): ADS8517
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