參數(shù)資料
型號: ADN2860ACPZ25-RL7
廠商: Analog Devices Inc
文件頁數(shù): 18/20頁
文件大?。?/td> 0K
描述: IC POT DGTL 3CH 25K 24-LFCSP
標準包裝: 1
接片: 128,512,512
電阻(歐姆): 25k
電路數(shù): 3
溫度系數(shù): 標準值 35 ppm/°C
存儲器類型: 非易失
接口: I²C(設備位址)
電源電壓: 2.7 V ~ 5.5 V,±2.25 V ~ 2.75 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應商設備封裝: 24-LFCSP-VQ(4x4)
包裝: 剪切帶 (CT)
其它名稱: ADN2860ACPZ25RLCT
ADN2860
Rev. B | Page 7 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
NC = NO CONNECT
1
RESET
2
WP
3
SCL
4
SDA
5
DGND
6
VSS
VDD
15 A0
16
17 TEST3 (NC)
18 TEST2 (NC)
14 W0
13 B0
7
A
2
8
W
2
9
B
2
1
W
1
2
B
1
0
A
1
2
1
A
1
_
E
2
A
0
_
E
2
3
A
D
1
2
4
A
D
0
2
0
T
E
S
T
0
(N
C
)
1
9
T
E
S
T
1
(N
C
)
TOP VIEW
(Not to Scale)
AD2860
03615-014
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
RESET
Resets the scratchpad register with current contents of the EEMEM register. Factory defaults to midscale before
any programming.
2
WP
Write Protect. When active low, WP prevents any changes to the present register contents, except that RESET
and Commands 1 and 8 still refresh the RDAC register from EEMEM.
3
SCL
Serial Input Register Clock. Shifts in one bit at a time upon the positive clock edges.
4
SDA
Serial Data Input. Shifts in one bit at a time upon the positive edges. The MSB is loaded first.
5
DGND
Ground. Logic ground reference.
6
VSS
Negative Supply. Connect to 0 V for single-supply applications.
7
A2
A Terminal of RDAC2.
8
W2
Wiper Terminal of RDAC2.
9
B2
B Terminal of RDAC2.
10
A1
A Terminal of RDAC1.
11
W1
Wiper Terminal of RDAC1.
12
B1
B Terminal of RDAC1.
13
B0
B Terminal of RDAC0.
14
W0
Wiper Terminal of RDAC0.
15
A0
A Terminal of RDAC0.
16
VDD
Positive Power Supply.
17
TEST3
Test Pin 3. Do not connect.
18
TEST2
Test Pin 2. Do not connect.
19
TEST1
Test Pin 1. Do not connect.
20
TEST0
Test Pin 0. Do not connect.
21
A1_EE
I2C Device Address 1 for EEMEM.
22
A0_EE
I2C Device Address 0 for EEMEM.
23
AD1
I2C Device Address 1 for RDAC.
24
AD0
I2C Device Address 0 for RDAC.
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