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參數(shù)資料
| 型號： | ADMC328 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 28-Lead ROM-Based DSP Motor Controller(28腳含ROM、數(shù)字信號處理的的馬達控制器) |
| 中文描述： | 28 - ROM的鉛基于DSP的電機控制器（28腳含光盤，數(shù)字信號處理的的馬達控制器） |
| 文件頁數(shù)： | 9/36頁 |
| 文件大?。?/td> | 470K |
| 代理商： | ADMC328 |
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PRELIMINARY TECHNICAL DATA ADMC328
–9–
REV. A
DSP CORE ARCHITECTURE OVERVIEW
Figure 3 is an overall block diagram of the DSP core of
the ADMC328, which is based on the fixed-point ADSP-
2171. T he flexible architecture and comprehensive instruc-
tion set of the ADSP-2171 allows the processor to perform
multiple operations in parallel. In one processor cycle
(50 ns with a 10 MHz CLK IN) the DSP core can:
Generate the next program address.
Fetch the next instruction.
Perform one or two data moves.
Update one or two data address pointers.
Perform a computational operation.
T his all takes place while the processor continues to:
Receive and transmit through the serial port.
Decrement the interval timer.
Generate three-phase PWM waveforms for a power in-
verter.
Generate two signals using the 8-bit auxiliary PWM tim-
ers.
Acquire four analog signals.
Decrement the watchdog timer.
T he processor contains three independent computational
units: the arithmetic and logic unit (ALU), the multiplier/
accumulator (MAC) and the shifter. T he computational
units process 16-bit data directly and have provisions to
support multiprecision computations. T he ALU performs a
standard set of arithmetic and logic operations as wellas
providing support for division primitives. T he MAC per-
forms single-cycle multiply, multiply/add, and multiply/
subtract operations with 40 bits of accumulation. T he
shifter performs logical and arithmetic shifts, normalization,
denormal-ization, and it derives exponent operations. T he
shifter can be used to efficiently implement numeric format
control including floating-point representations.
T he internal result R bus directly connects the computa-
tional units so that the output of any unit may be the input
of any unit on the next cycle.
A powerful program sequencer and two dedicated data
address generators ensure efficient delivery of operands to
these computational units. T he sequencer supports condi-
tional jumps and subroutine calls and returns in a single cycle.
With internal loop counters and loop stacks, the ADMC328
executes looped code with zero overhead; no explicit jump
instructions are required to maintain the loop.
T wo data address generators (DAGs) provide addresses for
simultaneous dual operand fetches from data memory and
program memory. Each DAG maintains and updates four
address pointers (I registers). Whenever the pointer is used
to access data (indirect addressing), it is post-modified by
the value in one of four modify (M registers). A length
value may be associated with each pointer (L registers) to
implement automatic modulo addressing for circular buff-
ers. T he circular buffering feature is also used by the serial
ports for automatic data transfers to and from on-chip
memory. DAG1 generates only data memory address but
provides an optional bit-reversal capability. DAG2 may
generate either program or data memory addresses, but has
no bit-reversal capability.
Efficient data transfer is achieved with the use of five inter-
nal buses:
Program memory address (PMA) bus
Program memory data (PMD) bus
Data memory address (DMA) bus
Data memory data (DMD) bus
Result (R) bus
Program memory can store both instructions and data,
permitting the ADMC 328 to fetch two operands in a
single cycle—one from program memory and one from
data memory. T he ADMC328 can fetch an operand from
on-chip program memory and the next instruction in the
same cycle.
T he ADMC328 writes data from its 16-bit registers to the
24-bit program memory using the PX register to provide
the lower eight bits. When it reads data (not instructions)
from 24-bit program memory to a 16-bit data register, the
lower eight bits are placed in the PX register.
T he ADMC328 can respond to a number of distinct DSP
core and peripheral interrupts. T he DSP interrupts com-
prise a serial port receive interrupt, a serial port transmit
interrupt, a timer interrupt, and two software interrupts.
Additionally, the motor control peripherals include two
PWM interrupts and a PIO interrupt.
T he serial port (SPORT 1) provides a complete synchro-
nous serial interface with optional companding in hardware
and a wide variety of framed and unframed data transmit
and receive modes of operation. SPORT 1 can generate an
internal programmable serial clock or accept an external
serial clock.
A programmable interval counter is also included in the
DSP core and can be used to generate periodic interrupts.
A 16-bit count register (T COUNT ) is decremented every
n
processor cycles, where n–1 is a scaling value stored in
the 8-bit T SCALE register. When the value of the counter
reaches zero, an interrupt is generated and the count register
is reloaded from a 16-bit period register (T PERIOD).
T he ADMC328 instruction set provides flexible data
moves and multifunction (one or two data moves with a
computation) instructions. Each instruction is executed in a
single 50 ns processor cycle (for a 10 MHz CLK IN). T he
ADMC328 assembly language uses an algebraic syntax for
ease of coding and readability. A comprehensive set of
development tools support program development. For
further information on the DSP core, refer to the
ADSP-
2100 Family User’s Manual, Third Edition
, with particular
reference to the ADSP-2171.
Serial Port
T he ADMC328 incorporates a complete synchronous
serial port (SPORT 1) for serial communication and multi-
processor communication. Following is a brief list of capa-
bilities of the ADMC328 SPORT 1. Refer to the
ADSP-2100
Family User’s Manual, Third Edition,
for further details.
SPORT 1 is bidirectional and has a separate, double-
buffered transmit and receive sections.
SPORT 1 can use an external serial clock or generate its
own serial clock internally.
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| ADMC401-ADVEVALKIT | Circular Connector; No. of Contacts:5; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:10; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:10-5 RoHS Compliant: No |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADMC328TN | 制造商:AD 制造商全稱:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328TN-XXX-YY | 制造商:AD 制造商全稱:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328TR | 制造商:AD 制造商全稱:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328TR-XXX-YY | 制造商:AD 制造商全稱:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328YN | 制造商:AD 制造商全稱:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller with Current Sense |
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