I2C Read and Write Operations Figure 51 shows th" />
參數(shù)資料
型號： ADAU1461WBCPZ
廠商： Analog Devices Inc
文件頁數(shù)： 32/88頁
文件大?。?/td> 0K
描述： IC SIGMADSP 24BIT 96KHZ PLL 32
標準包裝： 1
系列： SigmaDSP®
類型： 音頻處理器
應(yīng)用： 車載音頻
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-VQ
包裝： 托盤
ADAU1461
Rev. 0 | Page 38 of 88
I2C Read and Write Operations
Figure 51 shows the format of a single-word write operation.
Every ninth clock pulse, the ADAU1461 issues an acknowledge
by pulling SDA low.
Figure 52 shows the format of a burst mode write sequence. This
figure shows an example of a write to sequential single-byte
registers. The ADAU1461 increments its subaddress register
after every byte because the requested subaddress corresponds
to a register or memory area with a 1-byte word length.
Figure 53 shows the format of a single-word read operation. Note
that the first R/W bit is 0, indicating a write operation. This is
because the subaddress still needs to be written to set up the
internal address. After the ADAU1461 acknowledges the receipt
of the subaddress, the master must issue a repeated start command
followed by the chip address byte with the R/W bit set to 1 (read).
This causes the ADAU1461 SDA to reverse and begin driving
data back to the master. The master then responds every ninth
pulse with an acknowledge pulse to the ADAU1461.
Figure 54 shows the format of a burst mode read sequence. This
figure shows an example of a read from sequential single-byte
registers. The ADAU1461 increments its subaddress register
after every byte because the requested subaddress corresponds
to a register or memory area with a 1-byte word length. The
ADAU1461 always decodes the subaddress and sets the auto-
increment circuit so that the address increments after the
appropriate number of bytes.
Figure 51 to Figure 54 use the following abbreviations:
S = start bit
P = stop bit
AM = acknowledge by master
AS = acknowledge by slave
S
Chip address,
R/W = 0
AS
Subaddress high byte
AS
Subaddress low byte
AS
Data Byte 1
P
Figure 51. Single-Word I2C Write Format
S
Chip address,
R/W = 0
AS
Subaddress
high byte
AS
Subaddress
low byte
AS
Data
Byte 1
AS
Data
Byte 2
AS
Data
Byte 3
AS
Data
Byte 4
AS
…
P
Figure 52. Burst Mode I2C Write Format
S
Chip address,
R/W = 0
AS
Subaddress high
byte
AS
Subaddress low
byte
AS
S
Chip address,
R/W = 1
AS
Data
Byte 1
P
Figure 53. Single-Word I2C Read Format
S
Chip address,
R/W = 0
AS
Subaddress
high byte
AS
Subaddress
low byte
AS
S
Chip address,
R/W = 1
AS
Data
Byte 1
AM
Data
Byte 2
AM
…
P
Figure 54. Burst Mode I2C Read Format
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ADAU1461WBCPZ-R7 功能描述:IC SIGMADSP 24BIT 96KHZ PLL 32 RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6
ADAU1461WBCPZ-RL 功能描述:IC SIGMADSP 24BIT 96KHZ PLL 32 RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6
ADAU1462WBCPZ150 功能描述:32BIT SIGMADSP AUDIO 16K/48K 制造商:analog devices inc. 系列:* 包裝:管件 零件狀態(tài):在售 安裝類型:表面貼裝 封裝/外殼:72-VFQFN 裸露焊盤，CSP 供應(yīng)商器件封裝:72-LFCSP（10x10） 標準包裝:1
ADAU1462WBCPZ150RL 功能描述:32BIT SIGMADSP AUDIO 16K/48K 制造商:analog devices inc. 系列:* 包裝:帶卷（TR） 零件狀態(tài):在售 安裝類型:表面貼裝 封裝/外殼:72-VFQFN 裸露焊盤，CSP 供應(yīng)商器件封裝:72-LFCSP（10x10） 標準包裝:2,000
ADAU1462WBCPZ300 功能描述:32BIT SIGMADSP AUDIO 16K/48K 制造商:analog devices inc. 系列:* 包裝:管件 零件狀態(tài):在售 安裝類型:表面貼裝 封裝/外殼:72-VFQFN 裸露焊盤，CSP 供應(yīng)商器件封裝:72-LFCSP（10x10） 標準包裝:1
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