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| 型號(hào)： | ADAU1373BCBZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 233/296頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CODEC LP CLASS G HP 81WLCSP |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 類型： | 音頻編解碼器 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 數(shù)量： | 1 / 2 |
| 三角積分調(diào)變： | 是 |
| S/N 比，標(biāo)準(zhǔn) ADC / DAC (db)： | 96 / 96 |
| 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： | 96 / 96 |
| 電壓 - 電源，模擬： | 1.62 V ~ 1.98 V |
| 電壓 - 電源，數(shù)字： | 1.08 V ~ 1.98 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 81-UFBGA，WLCSP |
| 供應(yīng)商設(shè)備封裝： | 81-WLCSP（4.05x3.82） |
| 包裝： | 帶卷 (TR) |
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ADAU1373
Rev. 0 | Page 41 of 296
Input Impedance
The input resistance for Analog Input 1 through Analog Input 4
(AINx, Ball A5 through Ball A8 and Ball B5 through Ball B8)
depends on the gain mode setting. The input resistance is lowest
(at approximately 5.6 kΩ) for a +18 dB gain in PGA mode, and
it is highest (at approximately 47 kΩ) for a 12 dB setting. In
boost mode, the input resistance is constant at 20 kΩ. The input
resistance must be considered when calculating the required input
coupling capacitor. It is recommended that the lowest value of
the impedance be used when determining the microphone input
coupling capacitor.
Common-Mode Input Voltage
The common-mode voltage at the input pins (AINx) is typically
at AVDD/2. The common-mode voltage at the inputs is turned
off when the inputs are muted. The common-mode voltage
rises slowly as the inputs are unmuted and charges the input
capacitors. To prevent the turn on pop, it is recommended that
the inputs be unmuted in the ADAU1373 and be muted at the
source. If this recommendation is not adhered to, there is a
possibility of a turn on pop as the common-mode voltage at the
inputs charges up.
MIXER BLOCK
The ADAU1373 provides the analog mixer block for mixing the
analog inputs. The mixer block is available prior to the ADC,
line output, headphone output, speaker output, and earpiece
output, which provides the system designer with many
configuration options.
ADC Mixer Input
The mixer prior to the ADC input allows selection of any or all of
the four analog inputs. When multiple inputs are selected, they are
mixed prior to the ADC. Register 0x12 and Register 0x13 can be
used to select the signals that are input to the ADC mixer.
Line Mixer Output
The mixer prior to the line output amplifier allows selection of any
or all of the four analog inputs, as well as the DAC outputs. When
multiple inputs are selected, they are mixed prior to the line
output amplifier. Register 0x14 through Register 0x17 can be
used to select the signals that are input to the line mixer.
Headphone Mixer Output
The mixer prior to the headphone output amplifier allows
selection of any or all of the four analog inputs, as well as the
DAC outputs. When multiple inputs are selected, they are mixed
prior to the headphone output amplifier. Register 0x1A and
Register 0x1B can be used to select the signals going to the
headphone mixer.
Speaker Mixer Output
The mixer prior to the headphone output amplifier allows selection
of any or all of the four analog inputs, as well as the DAC outputs.
Register 0x18 and Register 0x19 can be used to select the signals
going to the speaker mixer.
Earpiece Mixer Output
The mixer prior to the earpiece amplifier allows selection of
any or all of the four analog inputs, as well as the DAC output.
When multiple inputs are selected, they are mixed prior to the
earpiece output amplifier. Register 0x1C can be used to select
the signals going to the earpiece mixer.
ANALOG OUTPUTS
Line Output
The ADAU1373 provides two single-ended stereo line level outputs
on LOUT1L (Ball C7) and LOUT1R (Ball D7) or on LOUT2L
(Ball D8) and LOUT2R (Ball D9). The line level outputs can be
configured as single-ended or differential. The stereo differential
outputs are available on LOUTLP (Ball C7) and LOUTLN
(Ball D8) or on LOUTRP (Ball D7) and LOUTRN (Ball D9). The
line output control register (Register 0x24) can be used to set the
line output mode. The outputs have series resistance to protect
against output short circuit. The typical recommended load
impedance is approximately 47 kΩ. The line output amplifier uses
AVDD as its supply; therefore, the common-mode output level
on the line output pins is AVDD/2. Coupling capacitors must be
used before connecting the outputs to the desired load. The value
of the capacitors can be determined by the following:
Frequency f (3 dB) = 1/(2 × π × ROUT × COUT)
where ROUT = 0.3 Ω.
Set the desired 3 dB low frequency at the output. The line outputs
can receive input from any or all of the four inputs directly or
The line outputs have a ground noise rejection feature that can be
enabled using Register 0x24, Bit 2 (LNFBEN). When enabled, the
line output amplifier rejects the noise on LN1FBIN (Ball E7) and
LN2FBIN (Ball E8). To use this feature, E7 and E8 must be con-
nected directly to the ground node (typically, the sleeve contact
of the line output socket) using a capacitor. The ground noise
rejection feature is very useful in applications where the line
outputs are used to connect to an external audio system (such as
a home theater or docking station) that works on a different power
supply and can cause a ground loop when connected to the line
output using a single-ended (unbalanced) connection.
Line Output Full-Scale Level
The full-scale output for the line output depends on AVDD.
At AVDD = 1.8 V, the full-scale output level is 0.5 V rms single-
ended or 1 V rms differential. The full-scale input level scales
linearly with the level of AVDD.
Line Output Volume Control
The line output level can be controlled using Register 0x09
(Left Channel Line Output 1 volume control), Register 0x0A
(Right Channel Line Output 1 volume control), Register 0x0B
(Left Channel Line Output 2 volume control), and Register 0x0C
(Right Channel Line Output 2 volume). The volume control
range is from mute to 0 dB in 32 steps.
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| ADAU1381 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Noise Stereo Codec with Enhanced Recording and Playback Processing |
| ADAU1381BCBZ-RL | 功能描述:IC AUDIO CODEC STEREO LN 30WLCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| ADAU1381BCBZ-RL7 | 功能描述:IC AUDIO CODEC STEREO LN 30WLCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| ADAU1381BCPZ | 功能描述:IC AUDIO CODEC STEREO LN 32LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| ADAU1381BCPZ-RL | 功能描述:IC AUDIO CODEC STEREO LN 32LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
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